Disable ICACHE before access flash regions where caching is not pract…

[xu-yingjing]

Disable ICACHE before access flash regions where caching is not practical.

[RJMSTM]

Hello,

Could you provide additional information on why it's necessary to disable the instruction cache (ICACHE) before accessing flash memory regions where caching would be ineffective? What specific issue are you encountering?

Regards,

[xu-yingjing]

Hello,
The following code is in the function HAL_DAC_ConfigChannel() of the file stm32h5xx_hal_dac.c:

const __IO uint16_t *tmp_package = (uint16_t *)PACKAGE_BASE;

The macro definition PACKAGE_BASE is defined in the stm32h562xx.h file as follows:

#define PACKAGE_BASE            (0x08FFF80EUL) /*!< Package data register base address     */

The address 0x08FFF80E is located at the flash regions where caching is not practical (OTP, RO, data area).
And according to section 7.3.2 of the STM32H5 reference manual(RM0481 Rev 1):

By default, all the AHB memory range is cacheable. For regions where caching is not practical (OTP, RO, data area), MPU must be used to disable local cacheability.

So, when accessing the value at address PACKAGE_BASE, is need to ensure that ICACHE is disabled?