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i64x2.ne instruction #411

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Jan 30, 2021
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i64x2.ne instruction #411

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b4fbf7e
i64x2.ne instruction
Maratyszcza Dec 23, 2020
9636723
Merge branch 'master' into cmpne-64bit
tlively Jan 30, 2021
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1 change: 1 addition & 0 deletions proposals/simd/BinarySIMD.md
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Expand Up @@ -250,3 +250,4 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive).
| `v128.store32_lane` | `TBD`| m:memarg, i:ImmLaneIdx4 |
| `v128.store64_lane` | `TBD`| m:memarg, i:ImmLaneIdx2 |
| `i64x2.eq` | `TBD`| - |
| `i64x2.ne` | `TBD`| - |
1 change: 1 addition & 0 deletions proposals/simd/ImplementationStatus.md
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Expand Up @@ -218,6 +218,7 @@
| `v128.store16_lane` | | | | | |
| `v128.store32_lane` | | | | | |
| `v128.store64_lane` | | | | | |
| `i64x2.ne` | | | | | |

[1] Tip of tree LLVM as of May 20, 2020

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1 change: 1 addition & 0 deletions proposals/simd/SIMD.md
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Expand Up @@ -736,6 +736,7 @@ def S.eq(a, b):
* `i8x16.ne(a: v128, b: v128) -> v128`
* `i16x8.ne(a: v128, b: v128) -> v128`
* `i32x4.ne(a: v128, b: v128) -> v128`
* `i64x2.ne(a: v128, b: v128) -> v128`
* `f32x4.ne(a: v128, b: v128) -> v128`
* `f64x2.ne(a: v128, b: v128) -> v128`

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