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Final opcodes #452

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Feb 19, 2021
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Final opcodes #452

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45112d3
Final opcodes
tlively Feb 6, 2021
7633dd0
Add ops from #232 to NewOpcodes.md
tlively Feb 6, 2021
37de1c3
Undo spurious change
tlively Feb 8, 2021
2cabfd4
Address feedback, compact to 0xff
tlively Feb 9, 2021
01b5f01
Swap truc_sat_zero and convert_low
tlively Feb 9, 2021
bbb3b5f
Fix q15 mul opcode
tlively Feb 9, 2021
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80 changes: 40 additions & 40 deletions proposals/simd/BinarySIMD.md
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Original file line number Diff line number Diff line change
Expand Up @@ -228,43 +228,43 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive).
| `f32x4.convert_i32x4_u` | `0xfb`| - |
| `v128.load32_zero` | `0xfc`| - |
| `v128.load64_zero` | `0xfd`| - |
| `i16x8.extmul_low_i8x16_s` | `0x110`| - |
| `i16x8.extmul_high_i8x16_s` | `0x111`| - |
| `i16x8.extmul_low_i8x16_u` | `0x112`| - |
| `i16x8.extmul_high_i8x16_u` | `0x113`| - |
| `i32x4.extmul_low_i16x8_s` | `0x114`| - |
| `i32x4.extmul_high_i16x8_s` | `0x115`| - |
| `i32x4.extmul_low_i16x8_u` | `0x116`| - |
| `i32x4.extmul_high_i16x8_u` | `0x117`| - |
| `i64x2.extmul_low_i32x4_s` | `0x118`| - |
| `i64x2.extmul_high_i32x4_s` | `0x119`| - |
| `i64x2.extmul_low_i32x4_u` | `0x11a`| - |
| `i64x2.extmul_high_i32x4_u` | `0x11b`| - |
| `i16x8.q15mulr_sat_s` | `TBD`| - |
| `v128.any_true` | `TBD`| - |
| `v128.load8_lane` | `TBD`| m:memarg, i:ImmLaneIdx16 |
| `v128.load16_lane` | `TBD`| m:memarg, i:ImmLaneIdx8 |
| `v128.load32_lane` | `TBD`| m:memarg, i:ImmLaneIdx4 |
| `v128.load64_lane` | `TBD`| m:memarg, i:ImmLaneIdx2 |
| `v128.store8_lane` | `TBD`| m:memarg, i:ImmLaneIdx16 |
| `v128.store16_lane` | `TBD`| m:memarg, i:ImmLaneIdx8 |
| `v128.store32_lane` | `TBD`| m:memarg, i:ImmLaneIdx4 |
| `v128.store64_lane` | `TBD`| m:memarg, i:ImmLaneIdx2 |
| `i64x2.eq` | `TBD`| - |
| `i64x2.ne` | `TBD`| - |
| `i64x2.lt_s` | `TBD`| - |
| `i64x2.gt_s` | `TBD`| - |
| `i64x2.le_s` | `TBD`| - |
| `i64x2.ge_s` | `TBD`| - |
| `i64x2.all_true` | `TBD`| - |
| `f64x2.convert_low_i32x4_s` | `TBD`| - |
| `f64x2.convert_low_i32x4_u` | `TBD`| - |
| `i32x4.trunc_sat_f64x2_s_zero` | `TBD`| - |
| `i32x4.trunc_sat_f64x2_u_zero` | `TBD`| - |
| `f32x4.demote_f64x2_zero` | `TBD`| - |
| `f64x2.promote_low_f32x4` | `TBD`| - |
| `i8x16.popcnt` | `TBD`| - |
| `i16x8.extadd_pairwise_i8x16_s` | `TBD`| - |
| `i16x8.extadd_pairwise_i8x16_u` | `TBD`| - |
| `i32x4.extadd_pairwise_i16x8_s` | `TBD`| - |
| `i32x4.extadd_pairwise_i16x8_u` | `TBD`| - |
| `i16x8.extmul_low_i8x16_s` | `0x10c`| - |
| `i16x8.extmul_high_i8x16_s` | `0x10d`| - |
| `i16x8.extmul_low_i8x16_u` | `0x10e`| - |
| `i16x8.extmul_high_i8x16_u` | `0x10f`| - |
| `i32x4.extmul_low_i16x8_s` | `0x110`| - |
| `i32x4.extmul_high_i16x8_s` | `0x111`| - |
| `i32x4.extmul_low_i16x8_u` | `0x112`| - |
| `i32x4.extmul_high_i16x8_u` | `0x113`| - |
| `i64x2.extmul_low_i32x4_s` | `0x114`| - |
| `i64x2.extmul_high_i32x4_s` | `0x115`| - |
| `i64x2.extmul_low_i32x4_u` | `0x116`| - |
| `i64x2.extmul_high_i32x4_u` | `0x117`| - |
| `i16x8.q15mulr_sat_s` | `0x9c`| - |
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I believe it is 0x82 (i16x8.extmul_low_i8x16_s uses 0x9c)

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Thanks, fixed.

| `v128.any_true` | `0x53`| - |
| `v128.load8_lane` | `0x54`| m:memarg, i:ImmLaneIdx16 |
| `v128.load16_lane` | `0x55`| m:memarg, i:ImmLaneIdx8 |
| `v128.load32_lane` | `0x56`| m:memarg, i:ImmLaneIdx4 |
| `v128.load64_lane` | `0x57`| m:memarg, i:ImmLaneIdx2 |
| `v128.store8_lane` | `0x58`| m:memarg, i:ImmLaneIdx16 |
| `v128.store16_lane` | `0x59`| m:memarg, i:ImmLaneIdx8 |
| `v128.store32_lane` | `0x5a`| m:memarg, i:ImmLaneIdx4 |
| `v128.store64_lane` | `0x5b`| m:memarg, i:ImmLaneIdx2 |
| `i64x2.eq` | `0x102`| - |
| `i64x2.ne` | `0x103`| - |
| `i64x2.lt_s` | `0x104`| - |
| `i64x2.gt_s` | `0x105`| - |
| `i64x2.le_s` | `0x106`| - |
| `i64x2.ge_s` | `0x107`| - |
| `i64x2.all_true` | `0xc3`| - |
| `f64x2.convert_low_i32x4_s` | `0xfc`| - |
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fc and fd are taken by v128.load32_zero and v128.load64_zero

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Thanks for catching that!

| `f64x2.convert_low_i32x4_u` | `0xfd`| - |
| `i32x4.trunc_sat_f64x2_s_zero` | `0xfe`| - |
| `i32x4.trunc_sat_f64x2_u_zero` | `0xff`| - |
| `f32x4.demote_f64x2_zero` | `0x100`| - |
| `f64x2.promote_low_f32x4` | `0x101`| - |
| `i8x16.popcnt` | `0x74`| - |
| `i16x8.extadd_pairwise_i8x16_s` | `0x108`| - |
| `i16x8.extadd_pairwise_i8x16_u` | `0x109`| - |
| `i32x4.extadd_pairwise_i16x8_s` | `0x10a`| - |
| `i32x4.extadd_pairwise_i16x8_u` | `0x10b`| - |
84 changes: 71 additions & 13 deletions proposals/simd/NewOpcodes.md
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Original file line number Diff line number Diff line change
Expand Up @@ -77,13 +77,25 @@
| v128.or | 0x50 |
| v128.xor | 0x51 |
| v128.bitselect | 0x52 |
| v128.any_true | 0x53 |

| Load Lane Op | opcode |
| ----------------- | ------ |
| v128.load8_lane | 0x54 |
| v128.load16_lane | 0x55 |
| v128.load32_lane | 0x56 |
| v128.load64_lane | 0x57 |
| v128.store8_lane | 0x58 |
| v128.store16_lane | 0x59 |
| v128.store32_lane | 0x5a |
| v128.store64_lane | 0x5b |

| i8x16 Op | opcode | i16x8 Op | opcode | i32x4 Op | opcode | i64x2 Op | opcode |
| -------------------- | ------ | ------------------------ | ------ | ------------------------ | ------ | ------------------------ | ------ |
| i8x16.abs | 0x60 | i16x8.abs | 0x80 | i32x4.abs | 0xa0 | i64x2.abs | 0xc0 |
| i8x16.neg | 0x61 | i16x8.neg | 0x81 | i32x4.neg | 0xa1 | i64x2.neg | 0xc1 |
| ------------- | 0x62 | ------------- | 0x82 | ------------- | 0xa2 | ------------- | 0xc2 |
| i8x16.all_true | 0x63 | i16x8.all_true | 0x83 | i32x4.all_true | 0xa3 | (i64x2.all_true) [TBD] | 0xc3 |
| i8x16.popcnt | 0x62 | ------------- | 0x82 | ------------- | 0xa2 | ------------- | 0xc2 |
| i8x16.all_true | 0x63 | i16x8.all_true | 0x83 | i32x4.all_true | 0xa3 | i64x2.all_true | 0xc3 |
| i8x16.bitmask | 0x64 | i16x8.bitmask | 0x84 | i32x4.bitmask | 0xa4 | i64x2.bitmask | 0xc4 |
| i8x16.narrow_i16x8_s | 0x65 | i16x8.narrow_i32x4_s | 0x85 | ---- narrow ---- | 0xa5 | ------------- | 0xc5 |
| i8x16.narrow_i16x8_u | 0x66 | i16x8.narrow_i32x4_u | 0x86 | ---- narrow ---- | 0xa6 | ------------- | 0xc6 |
Expand All @@ -100,14 +112,26 @@
| i8x16.sub | 0x71 | i16x8.sub | 0x91 | i32x4.sub | 0xb1 | i64x2.sub | 0xd1 |
| i8x16.sub_sat_s | 0x72 | i16x8.sub_sat_s | 0x92 | ---- sub_sat ---- | 0xb2 | ------------- | 0xd2 |
| i8x16.sub_sat_u | 0x73 | i16x8.sub_sat_u | 0x93 | ---- sub_sat ---- | 0xb3 | ------------- | 0xd3 |
| ------------- | 0x74 | ------------- | 0x94 | ------------- | 0xb4 | ------------- | 0xd4 |
| | 0x74 | ------------- | 0x94 | ------------- | 0xb4 | ------------- | 0xd4 |
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Spurious change from dashes to blank?

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Indeed, fixed!

| ---- mul ---- | 0x75 | i16x8.mul | 0x95 | i32x4.mul | 0xb5 | i64x2.mul | 0xd5 |
| i8x16.min_s | 0x76 | i16x8.min_s | 0x96 | i32x4.min_s | 0xb6 | ------------- | 0xd6 |
| i8x16.min_u | 0x77 | i16x8.min_u | 0x97 | i32x4.min_u | 0xb7 | ------------- | 0xd7 |
| i8x16.max_s | 0x78 | i16x8.max_s | 0x98 | i32x4.max_s | 0xb8 | ------------- | 0xd8 |
| i8x16.max_u | 0x79 | i16x8.max_u | 0x99 | i32x4.max_u | 0xb9 | ------------- | 0xd9 |
| ---------------- | 0x7a | ---------------- | 0x9a | i32x4.dot_i16x8_s | 0xba | ------------- | 0xda |
| i8x16.avgr_u | 0x7b | i16x8.avgr_u | 0x9b | ---- avgr_u ---- | 0xbb | ------------- | 0xdb |
| i8x16.max_s | 0x78 | i16x8.max_s | 0x98 | i32x4.max_s | 0xb8 | ------------- | - |
| i8x16.max_u | 0x79 | i16x8.max_u | 0x99 | i32x4.max_u | 0xb9 | ------------- | - |
| ---------------- | 0x7a | ---------------- | 0x9a | i32x4.dot_i16x8_s | 0xba | ------------- | - |
| i8x16.avgr_u | 0x7b | i16x8.avgr_u | 0x9b | ---- avgr_u ---- | 0xbb | ------------- | - |
| ---------------- | 0x7c | i16x8.q15mulr_sat_s | 0x9c | ---------------- | 0xbc | ------------- | - |
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| Rounding Op | opcode |
| ------------- | ------ |
| f32x4.ceil | 0xd8 |
| f32x4.floor | 0xd9 |
| f32x4.trunc | 0xda |
| f32x4.nearest | 0xdb |
| f64x2.ceil | 0xdc |
| f64x2.floor | 0xdd |
| f64x2.trunc | 0xde |
| f64x2.nearest | 0xdf |

| f32x4 Op | opcode | f64x2 Op | opcode |
| --------------- | ------ | --------------- | ------ |
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Expand All @@ -124,9 +148,43 @@
| f32x4.pmin | 0xea | f64x2.pmin | 0xf6 |
| f32x4.pmax | 0xeb | f64x2.pmax | 0xf7 |

| Conversion Op | opcode |
| ----------------------- | ------ |
| i32x4.trunc_sat_f32x4_s | 0xf8 |
| i32x4.trunc_sat_f32x4_u | 0xf9 |
| f32x4.convert_i32x4_s | 0xfa |
| f32x4.convert_i32x4_u | 0xfb |
| Conversion Op | opcode |
| ---------------------------- | ------ |
| i32x4.trunc_sat_f32x4_s | 0xf8 |
| i32x4.trunc_sat_f32x4_u | 0xf9 |
| f32x4.convert_i32x4_s | 0xfa |
| f32x4.convert_i32x4_u | 0xfb |
| f64x2.convert_low_i32x4_s | 0xfc |
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| f64x2.convert_low_i32x4_u | 0xfd |
| i32x4.trunc_sat_f64x2_s_zero | 0xfe |
| i32x4.trunc_sat_f64x2_u_zero | 0xff |
| f32x4.demote_f64x2_zero | 0x100 |
| f64x2.promote_low_f32x4 | 0x101 |

| I64x2 Cmp | opcode |
| ---------- | ------ |
| i64x2.eq | 0x102 |
| i64x2.ne | 0x103 |
| i64x2.lt_s | 0x104 |
| i64x2.gt_s | 0x105 |
| i64x2.le_s | 0x106 |
| i64x2.ge_s | 0x107 |

| Extending Arithmetic Op | opcode |
| ----------------------------- | ------ |
| i16x8.extadd_pairwise_i8x16_s | 0x108 |
| i16x8.extadd_pairwise_i8x16_u | 0x109 |
| i32x4.extadd_pairwise_i16x8_s | 0x10a |
| i32x4.extadd_pairwise_i16x8_u | 0x10b |
| i16x8.extmul_low_i8x16_s | 0x10c |
| i16x8.extmul_high_i8x16_s | 0x10d |
| i16x8.extmul_low_i8x16_u | 0x10e |
| i16x8.extmul_high_i8x16_u | 0x10f |
| i32x4.extmul_low_i16x8_s | 0x110 |
| i32x4.extmul_high_i16x8_s | 0x111 |
| i32x4.extmul_low_i16x8_u | 0x112 |
| i32x4.extmul_high_i16x8_u | 0x113 |
| i64x2.extmul_low_i32x4_s | 0x114 |
| i64x2.extmul_high_i32x4_s | 0x115 |
| i64x2.extmul_low_i32x4_u | 0x116 |
| i64x2.extmul_high_i32x4_u | 0x117 |