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Enable headless mode on RISC-V #4935

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merged 1 commit into from
Dec 28, 2023
Merged

Enable headless mode on RISC-V #4935

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6 changes: 6 additions & 0 deletions openjdk/openjdk.mk
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Original file line number Diff line number Diff line change
Expand Up @@ -16,6 +16,7 @@ NPROCS:=1
MEMORY_SIZE:=1024

OS:=$(shell uname -s)
ARCH:=$(shell uname -m)

ifeq ($(OS),Linux)
NPROCS:=$(shell grep -c ^processor /proc/cpuinfo)
Expand Down Expand Up @@ -97,6 +98,11 @@ ifeq ($(libcVendor),musl)
JTREG_KEY_OPTIONS := -k:'!headful'
VMOPTION_HEADLESS := -Djava.awt.headless=true
endif
# RISC-V is built in headless mode for now. See https://github.com/adoptium/ci-jenkins-pipelines/pull/867
ifeq ($(ARCH),riscv64)
JTREG_KEY_OPTIONS := -k:'!headful'
VMOPTION_HEADLESS := -Djava.awt.headless=true
endif
JTREG_BASIC_OPTIONS += $(JTREG_KEY_OPTIONS)

# set JTREG_BASIC_OPTIONS value into a new parameter before adding EXTRA_JTREG_OPTIONS
Expand Down