2022_r2 Patch1

Changelog

1. Supported tools version for this release are:

   • Xilinx Vivado 2022.2
   • Quartus Prime Pro Edition 22.4 / Quartus Prime Standard Edition 21.1*

2. Changes in 2022_r2 Patch1:

   • Projects added: adrv9026 on zcu102 support
   • Different bug fixes

3. Known issues:
   a. Versal based carriers (vck190) might not boot with 2022_r2 Patch1 image.

   The problem appears because some revisions of VCK190 or VPK may have the date/time set randomly or in 64bit format. To make them boot, it is enough to overwrite the date, following next steps:

   • when booting the board, hit any key to go into u-boot menu
   • type mw F12A0000 6613DE3D (this value is hexa of the date from Unix Converter webpage)
   • continue booting

   Another workaround is to boot it with GRHD files provided by Xilinx (doesn't matter if it's petalinux or yocto), and after is booting to type next commands:
   date -s "$(wget -qSO --max-redirect=0 google.com 2>&1 | grep Date: | cut -d' ' -f5-8)Z" & hwclock --systohc
   After reboot, you should be able to boot also with Kuiper official image.

   b. Video output may not work.
   There are two scripts that can be run in Kuiper terminal: enable_dummy_display.sh - which is used to create a display for zynq based boards and fix_x11.sh - which is used to create display for zynqmp based boards. Running the one for zynq on a zynqmp device or vice versa will broke video output. The solution is to delete the wrong created file if there exists (/usr/share/X11/xorg.conf.d/xorg.conf is created by enable_dummy_display.sh and /etc/X11/xorg.conf is created by fix_x11.sh).

   c. SysID value returned by dmesg during booting may be older that the last commit from this branch.
   This is expected since HDL projects are not recompiled if there are no changes that affects them. Also, for Arria10 SOC sysid value is expected to not be returned.

4. Reference links:
   HDL Testbenches repository
   Linux repository
   Kuiper repository
   NO-OS repository
   SD Card image

2022_r2

Changelog

1. Supported tools version for this release are:

Xilinx Vivado 2022.2
Quartus Prime Pro Edition 22.4
Quartus Prime Standard Edition 21.1*
*Quartus Standard 21.1 is used only for Cyclone5 projects (C5SOC Kit and DE10 nano)

2. New / removed projects in 2022_r2 Release:

Projects added:
ad411 on Zed (only No-OS support)

Projects removed (you can find pre-built files in previous releases or main):
ad9265_fmc on zc706
ad9434_fmc on zc706 (the project still remained in main)
ad9739a on zc706
cn0501 on coraz7s (the project still remained in main)
dac_fmc_ebz on a10soc (the project still remained in main)
fmcadc2 on vc707 and zc706
fmcadc5 on vc707
imageon
adrv9361z7035 and adrv9364z7020 on ccpackrf

3. Known issues:

1. Versal based carriers (vck190) won't boot with 2022_r2 Kuiper image

   The workaround is to boot it with GRHD files provided by Xilinx (doesn't matter if it's petalinux or yocto), and after is booting to type next
   commands:
   date -s "$(wget -qSO --max-redirect=0 google.com 2>&1 | grep Date: | cut -d' ' -f5-8)Z"; hwclock --systohc; poweroff

   Afterwards, it should boot also with Kuiper official image.

2. cn0506 mii/rmii hang during booting, on zynq platforms, if both ethernet ports are connected to the network.
   If there is rgmii, zynqmp platform or ports are not both connected, the setup will boot fine.

   The problem is already fixed and is part of latest boot files. To get it, is enough to run 'adi_update_boot.sh' from inside a 2022_r2 Kuiper.

3. Video output may not work. There are two scripts that can be run in Kuiper terminal: enable_dummy_display.sh - which is used to create a
   display for zynq based boards and fix_x11.sh - which is used to create display for zynqmp based boards. Running the one for zynq on a
   zynqmp device or vice versa will broke video output. The solution is to delete the wrong created file if there exists
   (/usr/share/X11/xorg.conf.d/xorg.conf is created by enable_dummy_display.sh and /etc/X11/xorg.conf is created by fix_x11.sh).

4. SysID value returned by dmesg during booting may be older that the last commit from this branch. This is expected since HDL projects
   are not recompiled if there are no changes that affects them. Also, for Arria10 SOC sysid value is expected to not be returned.

4. Reference links:

• HDL Testbenches repository
• Linux repository
• Kuiper repository
• NO-OS repository
• SD Card image

2021_r2

Changelog

1. Supported tools version for this release are:

Xilinx Vivado 2021.2
Quartus Prime Pro Edition 21.4
Quartus Prime Standard Edition 20.1.1*
*Quartus Standard 20.1.1 is used only for Cyclone5 projects (c5soc and de10nano)

2. New support added in 2021_R2 Release:

Projects that are not writing bitfile on FPGA, just booting Kuiper:
zynq-zed-otg
adv7513_de10nano

• New projects on zcu102:
  ad9695_fmc
  ad9081_fmca_ebz_x_band
  ad9081_fmca_ebz_x_band-vcxo100
  ad9081_fmca_ebz_x_band-vcxo100-direct-clk
  ad9081_fmca_ebz_x_band-direct-clk

• New projects on adrv9009zu11eg_adrv2crr:
  fmcxmwbr1
  clockdist

• New projects on coraz7s:
  ad719x_asdz
  cn0561
  cn0579

• New projects on Zed Board:
  ad777x_ardz
  adaq8092_fmc
  cn0561
  cn0577
  ad7768-4

• New projects on de10nano:
  ad777x_ardz
  cn0579

• cn0506 project got simplified. Now it's one single HDL project that can be built with parameters for different variations:

make INTF_CFG=RGMII (default value),
make INTF_CFG=MII or
make INTF_CFG=RMII

• Projects removed from 20212_r2 release; please use them from previous release or master:
  ad_fmclidar1_ebz on zc706
  cn0506_rgmii on a10soc
  all projects based on a10gx

• 2021_R2 will be the last release for next projects:
  ad9739a_fmc on zc706
  imageon on zed
  adrv9361z7035 on ccpackrf
  adrv9364z7020 on ccpackrf

3. Known issues:

1. On Arria10 SOC with cn0506_mii, IPs are not assigned on both ports even if dhcp is enabled.

2. Video output may not work. There are two scripts that can be run in Kuiper terminal: enable_dummy_display.sh - which is used to create a display for zynq based boards and fix_x11.sh - which is used to create display for zynqmp based boards. Running the one for zynq on a zynqmp device or vice versa will broke video output. The solution is to delete the wrong created file if there exists (/usr/share/X11/xorg.conf.d/xorg.conf is created by enable_dummy_display.sh and /etc/X11/xorg.conf is created by fix_x11.sh).

3. SysID value returned by dmesg during booting may be older that the last commit from this branch. This is expected since HDL projects are not recompiled if there are no changes that affects them. Also, for Arria10 SOC sysid value is not returned from dmesg log (dmesg | grep sysis)

4. Reference links:

• HDL Testbenches repository
• Linux repository
• Kuiper repository
• NO-OS repository
• SD Card image

2021_r1

Changelog

1. Supported tools version for this release are:

• Xilinx Vivado 2021.1
• Quartus Prime Pro Edition 21.2
• Quartus Prime Standard Edition 20.1*
  *Quartus Standard 20.1 is used only for Cyclone5 projects (c5soc and de10nano)

2. New projects:

• AD Quad MxFE support for vcu118
• ad4630-24 support for Zed Board
• ad9695_fmc support for zcu102
• ad9783_ebz support for zcu102
• xmicrowave support for adrv9009zu11eg
• cn0501 support for coraz7s

3. Major updates:

I. Adding support for:

• adrv9001/9002 on a10soc, zc706 and zcu102
• dac_fmc_ebz on vcu118

II. Suporting ad908x on multiple carriers and add examples built with different JESD configurations:

• ad9081_fmca_ebz.a10soc
• ad9081_fmca_ebz.a10soc_np12
• ad9081_fmca_ebz.vck190
• ad9081_fmca_ebz.vcu118_204c-txmode10-rxmode11
• ad9081_fmca_ebz.vcu118_204c-txmode10-rxmode11-24-75Gbps
• ad9081_fmca_ebz.vcu118_204c-txmode23-rxmode25
• ad9081_fmca_ebz.vcu118_204c-txmode23-rxmode25-24-75Gbps
• ad9081_fmca_ebz.vcu118_204c-txmode24-rxmode26-24-75Gbps
• ad9081_fmca_ebz.vcu118_m4_l8
• ad9081_fmca_ebz.vcu128
• ad9081_fmca_ebz.vcu128_m4_l8
• ad9081_fmca_ebz.zc706
• ad9081_fmca_ebz.zc706_np12
• ad9081_fmca_ebz.zcu102_204b-txmode9-rxmode4
• ad9081_fmca_ebz.zcu102_204c-txmode0-rxmode1
• ad9081_fmca_ebz.zcu102_m4_l8
• ad9082_fmca_ebz.zcu102
• ad9083_evb.zcu102

4. Known issues:

1. On Arria10 SOC with cn0506_mii, IPs are not assigned on both ports even if dhcp is enabled.

2. Video output may not work. There are two scripts that can be run in Kuiper terminal: enable_dummy_display.sh - which is used to create a display for zynq based boards and fix_x11.sh - which is used to create display for zynqmp based boards. Running the one for zynq on a zynqmp device or vice versa will broke video output. The solution is to delete the wrong created file if there exists (/usr/share/X11/xorg.conf.d/xorg.conf is created by enable_dummy_display.sh and /etc/X11/xorg.conf is created by fix_x11.sh).

5. Reference links:

• HDL Testbenches repository
• Linux repository
• Kuiper repository
• NO-OS repository
• SD Card image

2019_r2

Changelog

1. Supported tools version for this release are:

• Xilinx Vivado 2019.1
• Quartus Prime Pro Edition 19.3
• Quartus Prime Standard Edition 18.1*
  *Quartus Standard 18.1 is used only for Cyclone5 projects (c5soc and de10nano), arria10soc+cn0506_rgmii and arria10soc+fmcomms2

2. Major updates:

• axi_spi_engine, jesd204 (Multiple fixes and improvements)

• axi_ad6676, axi_ad9963, axi_adc_decimate, axi_adc_trigger, axi_generic_adc, (Fixes and improvements)

• axi_ad7616 (Update ad_edge_detect port names)

• axi_ad9739a (Add tristate option for ad_serdes_out)

• axi_dac_interpolate (Export signals indicating the rate)

• axi_i2s_adi (Create xgui files)

• spi_engine (Add pulse_width and pulse_period registers)

• util_adcfifo (Update interfaces for the asymetric memory)

• util_pack (Add support for 64 channels)

• New library:

  • axi_adrv9001

3. New projects:

• ad9081_fmca_ebz

• adv7513

• adrv9001/2

• cn0506_mii/rmii/rgmii

• Add support for next:

  • cn0540 with de10nano
  • ad9656_fmc with zcu102 Board
  • ad469x_fmc with Zed Board
  • fmcomms8 with adrv9009zu11eg_adrv2crr_
  • adrv9009 with s10soc

4. Known issues:

1. Next projects are failing. You can use them from older releases:

   • ad_fmclidar1_ebz on a10soc
   • fmcomms11 on zc706
   • dac_fmc_ebz on a10soc - failing with timing violation failure

2. Kuiper image does not extend to the capacity of SD Card
   Workaround: This happens when first use of a new created SD card is on a development board. If you see that the root fs partition is not extended to the SD card capacity minus 1 GB (fixed size of boot partition), just open a terminal and type

raspi-config --expand-rootfs

3. Sometimes .RBF file is not seen even if it exists in boot partition root
   Workaround: When there are too many files/folders in the BOOT drive on the SDcard it seems that the bootloader get confused. Delete some unused files should fix this issue, or delete everything on the BOOT drive and let only socfpga_arria10_socdk.rbf, socfpga_arria10_socdk_sdmmc.dtb and zImage.

4. Gnuradio gives a pop-up error when try to open it from Menu.
   Workaround: gnu radio can be opened from terminal by typing:

export PYTHONPATH=$PYTHONPATH:/usr/local/lib/python3/dist-packages
ldconfig

5. Cannot launch Scopy

5. Reference links:

• Linux repository
• Kuiper repository
• NO-OS repository
• SD Card image

hdl_2019_r1

Changelog:

1. Supported tools version for this release are:

   • Vivado 2018.3
   • Quartus Prime Standard Edition 18.1

2. Major updates:

• code refactoring (rename Altera to Intel)
• use smart connect in Xilinx designs
• add support for VCU118
• M2K cascading support

3. Library updates:

• optimized util_pack cores (util_cpack2 and util_upack2)
• add axi_fan_control

4. New projects:

• FMCOMMS11
• FMCLIDAR1_EBZ
• ADRV9009_ZU11EG
• DAC_FMC_EBZ supporting 8 different high speed DAC
• AD9208_DUAL_EBZ
• New GT projects: AD4020, AD5758, AD7405
• AD7768-1 with cora7z board

5. Reference links:

• Linux repository
• No-Os repository
• Pre-built SD Card images

hdl_2018_r2

Changelog:

1. Supported tools version for this release are:

   • Vivado 2018.2*
   • Quartus Prime Standard Edition 18.0

2. Major updates:

   • CORDIC based DDS
   • several DMAC improvements

3. Library updates:

   • Generic transport layer core for JESD204

4. New projects:

   • adrv9009_a10gx
   • adrv9009_a10soc
   • daq3_zcu102
   • fmcomms11_zc706

5. Reference links:

• Linux repository
• No-Os repository
• Pre-built SD Card images

*EXCEPTIONS: All the projects, that are using ZCU102 development platform, should be built with Vivado 2018.3, this is for the users owning a zcu102 rev1.1 starting from label 0432055-05. Due to an end of life of the DDR4 SODIMM part on the ZCU102 Evaluation Kit. The new memory requires different settings during the FSBL. Starting with Vivado 2018.3, when targeting a ZCU102 board, the FSBL will have a custom function to query the SPD prom on the DIMM to determine which DIMM is being used. This is described in:

• https://www.xilinx.com/support/answers/71961.html
• https://www.xilinx.com/support/answers/72113.html

hdl_2018_r1

Changelog:

1. Supported tools version for this release are:

   • Vivado 2017.4.1
   • Quartus 17.1.1

2. Major updates:

   • Improve Make files.
   • Delete or move deprecated or unused projects: usrpe31x, adrv9364z7020_ccusb, adrv9364z7035_ccusb, adrv9364z7020_ccpci, adv7511_ac701, adv7511_kcu105, adv7511_mitx, adv7511_vc707, adv7511_kc705, cftls, usb_fx3, cn0363_microzed, fmcomms2_ac701, fmcomms2_mitx045, m2k_zed, imageon_zc706
   • Move GTM projects to different branch (gtm_projects)

3. Library updates:

   • general cleanup of warnings
   • explicitly define clocks and resets in Xilinx IP
   • axi_clkgen supports Ultrascale

4. New projects:

   • adrv9009_zcu102
   • sidekiqz2

5. Reference links:

• Linux repository
• No-Os repository
• Pre-built SD Card images
• Pre-built Microblaze projects
• Pre-built Nios II Projects

hdl_2017_r1

Change log:

1. Supported tools version for this release are:
   • Vivado 2016.4*
   • Quartus 16.1
2. Major updates:
   • Updated License terms
   • Added ADI JESD204 Interface Framework and integrated it into all the JESD204 based projects
3. Library updates:
   • 1PPS receiver for axi_ad9361
   • avl_dacfifo for pl_ddrx offload (integrated to adrv9371/a10soc)
   • util_upack/util_rfifo - add valid signal turn around
4. Projects updates:
   • Rename pzsdr1 to adrv9364z7020
   • Rename pzsdr2 to adrv9361z7035
   • Several new porting:
     • adrv9371x to kcu105/zcu102
     • fmcomms2 to kcu105
     • daq1 to zed
     • daq3 to zcu102
   • Add adrv9379/zc706
   • Add util_dacfifo to daq3/a10gx
   • Add ad738x_fmc/zed

Note: The A10GX based projects may fail from time to time, as the synthesizer, router and mapper may not find a valid configuration. In case this happens, try regenerating the design with reduced address width for the ADC/DAC BRAM FIFOs.

*EXCEPTIONS: All the projects, that are using ZCU102 development platform, should be built with Vivado 2017.2, simply because Vivado 2016.4 does not support the production version of the FPGA (xczu9eg-ffvb1156-2-i).

hdl_2016_r2

Change log:

1. Supported tools version for this release are:
   • Vivado 2016.2
   • Quartus 16.0
2. Major updates:
   • IP cores that are specific to FPGA devices are moved into their own respective folders (altera/xilinx)
   • The JESD transceiver frame work has changed. The IP cores now support asymmetrical lane sharing across transmit and receive links while supporting dynamic reconfiguration. The Xilinx projects, the ADI transceiver cores may now be replaced with Xilinx JESD PHY IP at the expense of Eye Scan function.
   • The AD9361 IP core for Altera supports 1R1T mode as well as separate clock, receive and transmit primitives. The core supports both Cyclone V and Arria 10 devices.
   • Additional features added to axi_ad9361 IP core:
     • CMOS support
     • New parameters for finer data path configuration
     • TDD support, with optional ENABLE/TXNRX pin control by software.
   • Altera support for axi_ad9152
   • Add xilinx/axi_dacfifo for high speed DAC paths
3. Library changes:
   • Added new IP cores:
     • util_adxcvr
     • avl_adxcvr
     • axi_adxcvr
     • axi_ad9684
     • axi_ad9162
     • axi_ad7616
   • Removed obsolete and unsupported cores:
     • util_jesd_gt
     • util_gtlb
     • axi_jesd_gt
4. Project changes:
   • Supports Arria 10 SOC, Zynq MP SOC Ultrascale+ devices
   • DAQ1: add CPLD logic and new ADC core (axi_ad9684)
   • PZSDR moved to PZSDR2
   • FMCOMMS2: add support for A10GX and ZCU102
   • Removed obsolete and unsupported projects
     • FMCOMMS6
   • New projects:
     • ADRV9371X
     • FMCOMMS11
     • PZSDR1
     • PLUTO
     • USRPE31X
5. Unsupported or in development projects (do NOT use):
   • The FMCOMMS2 projects on Arria 10 devices is provided as a template ONLY. The project will NOT work on hardware (A10GX or A10SOC) due to Altera's lack of knowledge on their device bank/FMC pin assignments.
   • CFTL_CIP and CFTL_STD
   • FMCOMMS2 ZC706 Partial Reconfiguration (zc706pr)