AD9081 dev #2646
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AD9081 dev #2646
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Summary: - New PFILT configuration interface - Identifying Sysref frequency limitations - Extras allowing tx only and rx only use cases - Started spo sweep from 0 - Scaled y-axis of eye scan to recommended 4mV - Warn users using onboard PLL of deterministic latency limitations Signed-off-by: Michael Hennerich <[email protected]>
Update for API Version 1.7.0 Signed-off-by: Michael Hennerich <[email protected]>
* Switch to guarded mutex * Add mutex to direct_reg_access when used standalone Signed-off-by: Michael Hennerich <[email protected]>
… step Add option to skip the jesd204-fsm clock sync state. In case the desired/required frequencies are set in the dts on boot. This shouldn't cause problems. This option might be needed when clocks are crossing typologies. Signed-off-by: Michael Hennerich <[email protected]>
We need to program 128 coefficients in one run, otherwise the second set of coefficients will overwrite the first set. Signed-off-by: Michael Hennerich <[email protected]>
With API v1.7.0 we now have adi_ad9081_adc_pfir_coeff_table_load_set(). Use it in favor of our local function. Signed-off-by: Michael Hennerich <[email protected]>
mhennerich
requested review from
nunojsa,
dbogdan,
btogorean,
chegbeli,
buha,
amiclaus,
rbolboac,
danmois,
CiprianRegus and
machschmitt
as code owners
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PR Description
iio: adc: ad9081: Update API v1.7.0
iio: adc: ad9081: Update eyescan vector to include SPO=0
iio: adc: ad9081: Switch to guarded mutex and mutex to direct_reg_access
iio: frequency: ad9528: Add option to skip the jesd204-fsm clock sync step
iio: adc: ad9081: adi_ad9081_adc: Fix PFIR COMPLEX FULL load
iio: adc: ad9081: Use API function to load PFIR
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