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AD9164: Add Python example
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Signed-off-by: PopPaul2021 <[email protected]>
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PopPaul2021 committed Nov 1, 2024
1 parent 58c3827 commit e891315
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Showing 3 changed files with 67 additions and 6 deletions.
1 change: 1 addition & 0 deletions adi/__init__.py
Original file line number Diff line number Diff line change
Expand Up @@ -127,6 +127,7 @@
from adi.tddn import tddn

try:
from adi.sshfs import sshfs
from adi.jesd import jesd
except ImportError:
pass
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20 changes: 14 additions & 6 deletions adi/ad9162.py
Original file line number Diff line number Diff line change
Expand Up @@ -13,34 +13,34 @@ class ad9162(tx, context_manager, sync_start):

_complex_data = False
# _complex_data = True
_tx_channel_names = ["voltage0_i", "voltage0_q"]
_tx_channel_names = ["voltage0"]
_device_name = ""

def __init__(self, uri="", username="root", password="analog"):

context_manager.__init__(self, uri, self._device_name)

self._jesd = jesd(uri, username=username, password=password)
self._txdac = self._ctx.find_device("axi-ad9162-hpc")
self._txdac = self._ctx.find_device("axi-ad9164-hpc")

tx.__init__(self)

@property
def fir85_enable(self):
return self._get_iio_attr("voltage0_i", "fir85_enable", True, self._txdac)
return self._get_iio_attr("altvoltage0", "fir85_enable", True, self._txdac)

@fir85_enable.setter
def fir85_enable(self, value):
self._set_iio_attr("voltage0_i", "fir85_enable", True, value, self._txdac)
self._set_iio_attr("voltage0", "fir85_enable", True, value, self._txdac)

@property
def sample_rate(self):
"""sample_rate: Sample frequency rate TX path in samples per second."""
return self._get_iio_attr("voltage0_i", "sampling_frequency", True, self._txdac)
return self._get_iio_attr("voltage0", "sampling_frequency", True, self._txdac)

@property
def scale(self):
return self._get_iio_attr("voltage0_i", "scale", True, self._txdac)
return self._get_iio_attr("voltage0", "scale", True, self._txdac)

@property
def frequency_nco(self):
Expand All @@ -53,3 +53,11 @@ def frequency_nco(self, value):
@property
def jesd204_statuses(self):
return self._jesd.get_all_statuses()

def register_read(self, reg):
"""Direct Register Access via debugfs"""
self._set_iio_debug_attr_str("direct_reg_access", reg, self._txdac)
return self._get_iio_debug_attr_str("direct_reg_access", self._txdac)
def register_write(self, reg, value):
"""Direct Register Access via debugfs"""
self._set_iio_debug_attr_str("direct_reg_access", f"{reg} {value}", self._txdac)
52 changes: 52 additions & 0 deletions examples/ad9164_example.py
Original file line number Diff line number Diff line change
@@ -0,0 +1,52 @@
# Copyright (C) 2022 Analog Devices, Inc.
#
# SPDX short identifier: ADIBSD

import time
import sys
import adi
import math
import matplotlib.pyplot as plt
import numpy as np
from scipy import signal

url = "local:" if len(sys.argv) == 1 else sys.argv[1]
tx = adi.ad9162(url)
gpio_controller = adi.one_bit_adc_dac(uri=url, name="one-bit-adc-dac")
ssh = adi.sshfs(address=url, username="root", password="analog")

gpio_controller.gpio_dac_ctrl_0 = 1
gpio_controller.gpio_dac_ctrl_1 = 1
gpio_controller.gpio_dac_ctrl_2 = 1
gpio_controller.gpio_dac_ctrl_3 = 1
gpio_controller.gpio_dac_ctrl_4 = 0

tx.tx_cyclic_buffer = True
tx.tx_enabled_channels = [0]
dds_or_dma_signal = 1

#Signal generation

Amp = 0.5 * 2**16 # -6 dBFS
Freq = 1e9

fs = int(tx.sample_rate)
print(fs)
N_tx = int(fs/Freq)*8
T = N_tx / fs
t = np.linspace(0, T, N_tx)
tx_sig = Amp * np.sin(2 * math.pi * Freq * t)

if dds_or_dma_signal :
tx.dds_enabled = [1]
tx.dds_single_tone(Freq,0.5)
else:
tx.tx(tx_sig)

plt.plot(tx_sig)
plt.show()

if dds_or_dma_signal == 0:
tx.tx_destroy_buffer()

stdout, stderr = ssh._run(f"busybox devmem 0x{0x84a04000 + 0x0418:02x} 32 0x3")

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