Skip to content

Commit

Permalink
Refactor relocation loading to use static dicts (#504)
Browse files Browse the repository at this point in the history
* Refactor relocation loading to use static dicts

* Add __all__, remove arch

* Disable pylint missing-class-docstring in some relocation files

* Add PPC TLS relocations

* Update docs

* Apply same treatment to pe relocs

* [pre-commit.ci] auto fixes from pre-commit.com hooks

for more information, see https://pre-commit.ci

---------

Co-authored-by: pre-commit-ci[bot] <66853113+pre-commit-ci[bot]@users.noreply.github.com>
  • Loading branch information
twizmwazin and pre-commit-ci[bot] authored Aug 10, 2024
1 parent 1482b73 commit 14adcc5
Show file tree
Hide file tree
Showing 22 changed files with 867 additions and 490 deletions.
63 changes: 26 additions & 37 deletions cle/backends/elf/relocation/__init__.py
Original file line number Diff line number Diff line change
@@ -1,44 +1,36 @@
from __future__ import annotations

import importlib
import logging
import os
from collections import defaultdict

import archinfo
from .amd64 import relocation_table_amd64
from .arm import relocation_table_arm
from .arm64 import relocation_table_arm64
from .i386 import relocation_table_i386
from .mips import relocation_table_mips
from .ppc import relocation_table_ppc
from .ppc64 import relocation_table_ppc64
from .s390x import relocation_table_s390x
from .sparc import relocation_table_sparc

ALL_RELOCATIONS = {
"AMD64": relocation_table_amd64,
"ARMCortexM": relocation_table_arm,
"ARM": relocation_table_arm,
"AARCH64": relocation_table_arm64,
"ARMEL": relocation_table_arm,
"ARMHF": relocation_table_arm,
"X86": relocation_table_i386,
"MIPS32": relocation_table_mips,
"MIPS64": relocation_table_mips,
"PPC32": relocation_table_ppc,
"PPC64": relocation_table_ppc64,
"S390X": relocation_table_s390x,
"sparc:BE:32:default": relocation_table_sparc,
}

from cle.backends.relocation import Relocation

ALL_RELOCATIONS = defaultdict(dict)
complaint_log = set()

path = os.path.dirname(os.path.abspath(__file__))
log = logging.getLogger(name=__name__)


def load_relocations():
for filename in os.listdir(path):
if not filename.endswith(".py"):
continue
if filename == "__init__.py":
continue

log.debug("Importing ELF relocation module: %s", filename[:-3])
module = importlib.import_module(f".{filename[:-3]}", "cle.backends.elf.relocation")

try:
arch_name = module.arch
except AttributeError:
continue

for item_name in dir(module):
if item_name not in archinfo.defines:
continue
item = getattr(module, item_name)
if not isinstance(item, type) or not issubclass(item, Relocation):
continue

ALL_RELOCATIONS[arch_name][archinfo.defines[item_name]] = item
complaint_log = set()


def get_relocation(arch, r_type):
Expand All @@ -51,6 +43,3 @@ def get_relocation(arch, r_type):
complaint_log.add((arch, r_type))
log.warning("Unknown reloc %d on %s", r_type, arch)
return None


load_relocations()
58 changes: 56 additions & 2 deletions cle/backends/elf/relocation/amd64.py
Original file line number Diff line number Diff line change
@@ -1,3 +1,8 @@
"""Relocations for amd64/x86_64
Reference: https://gitlab.com/x86-psABIs/x86-64-ABI/-/jobs/artifacts/master/raw/x86-64-ABI/abi.pdf?job=build page 73
"""

from __future__ import annotations

from .generic import (
Expand All @@ -14,8 +19,6 @@
RelocTruncate32Mixin,
)

arch = "AMD64"


class R_X86_64_64(GenericAbsoluteAddendReloc):
pass
Expand Down Expand Up @@ -79,3 +82,54 @@ class R_X86_64_GOTPCRELX(RelocGOTMixin, RelocTruncate32Mixin, GenericPCRelativeA

class R_X86_64_REX_GOTPCRELX(RelocGOTMixin, RelocTruncate32Mixin, GenericPCRelativeAddendReloc):
check_sign_extend = True


relocation_table_amd64 = {
1: R_X86_64_64,
2: R_X86_64_PC32,
# 3: R_X86_64_GOT32,
4: R_X86_64_PLT32,
5: R_X86_64_COPY,
6: R_X86_64_GLOB_DAT,
7: R_X86_64_JUMP_SLOT,
8: R_X86_64_RELATIVE,
9: R_X86_64_GOTPCREL,
10: R_X86_64_32,
11: R_X86_64_32S,
# 12: R_X86_64_16,
# 13: R_X86_64_PC16,
# 14: R_X86_64_8,
# 15: R_X86_64_PC8,
16: R_X86_64_DTPMOD64,
17: R_X86_64_DTPOFF64,
18: R_X86_64_TPOFF64,
# 19: R_X86_64_TLSGD,
# 20: R_X86_64_TLSLD,
# 21: R_X86_64_DTPOFF32,
# 22: R_X86_64_GOTTPOFF,
# 23: R_X86_64_TPOFF32,
# 24: R_X86_64_PC64,
# 25: R_X86_64_GOTOFF64,
# 26: R_X86_64_GOTPC32,
# 32: R_X86_64_SIZE32,
# 33: R_X86_64_SIZE64,
# 34: R_X86_64_GOTPC32_TLSDESC,
# 35: R_X86_64_TLSDESC_CALL,
# 36: R_X86_64_TLSDESC,
37: R_X86_64_IRELATIVE,
# 38: R_X86_64_RELATIVE64,
# 39, 40: Deprecated
41: R_X86_64_GOTPCRELX,
42: R_X86_64_REX_GOTPCRELX,
# 43: R_X86_64_CODE_4_GOTPCRELX,
# 44: R_X86_64_CODE_4_GOTTPOFF,
# 45: R_X86_64_CODE_4_GOTPC32_TLSDESC,
# 46: R_X86_64_CODE_5_GOTPCRELX,
# 47: R_X86_64_CODE_5_GOTTPOFF,
# 48: R_X86_64_CODE_5_GOTPC32_TLSDESC,
# 49: R_X86_64_CODE_6_GOTPCRELX,
# 50: R_X86_64_CODE_6_GOTTPOFF,
# 51: R_X86_64_CODE_6_GOTPC32_TLSDESC,
}

__all__ = ("relocation_table_amd64",)
164 changes: 133 additions & 31 deletions cle/backends/elf/relocation/arm.py
Original file line number Diff line number Diff line change
@@ -1,3 +1,8 @@
"""Relocation types for ARM.
Reference: https://github.com/ARM-software/abi-aa/blob/main/aaelf32/aaelf32.rst#relocation-codes
"""

from __future__ import annotations

import logging
Expand All @@ -19,10 +24,6 @@
)

log = logging.getLogger(name=__name__)
arch = "ARM"

# Reference: "ELF for the ARM Architecture ABI r2.10"
# http://infocenter.arm.com/help/topic/com.arm.doc.ihi0044e/IHI0044E_aaelf.pdf


def _applyReloc(inst, result, mask=0xFFFFFFFF):
Expand Down Expand Up @@ -518,30 +519,131 @@ class R_ARM_GOT_PREL(GenericPCRelativeAddendReloc, RelocTruncate32Mixin, RelocGO
"""


__all__ = [
"arch",
"R_ARM_CALL",
"R_ARM_PREL31",
"R_ARM_REL32",
"R_ARM_ABS32",
"R_ARM_MOVW_ABS_NC",
"R_ARM_MOVT_ABS",
"R_ARM_THM_CALL",
"R_ARM_COPY",
"R_ARM_GLOB_DAT",
"R_ARM_JUMP_SLOT",
"R_ARM_RELATIVE",
"R_ARM_ABS32_NOI",
"R_ARM_REL32_NOI",
"R_ARM_TLS_DTPMOD32",
"R_ARM_TLS_DTPOFF32",
"R_ARM_TLS_TPOFF32",
"R_ARM_JUMP24",
"R_ARM_PC24",
"R_ARM_THM_JUMP24",
"R_ARM_THM_JUMP19",
"R_ARM_THM_JUMP6",
"R_ARM_THM_MOVW_ABS_NC",
"R_ARM_THM_MOVT_ABS",
"R_ARM_GOT_PREL",
]
relocation_table_arm = {
1: R_ARM_PC24,
2: R_ARM_ABS32,
3: R_ARM_REL32,
# 4: ARM_LDR_PC_G0,
# 5: R_ARM_ABS16,
# 6: R_ARM_ABS12,
# 7: R_ARM_THM_ABS5,
# 8: R_ARM_ABS8,
# 9: R_ARM_SBREL32,
10: R_ARM_THM_CALL,
# 11: R_ARM_THM_PC8,
# 12: R_ARM_BREL_ADJ,
# 13: R_ARM_TLS_DESC,
# 14: R_ARM_THM_SWI8,
# 15: R_ARM_XPC25,
# 16: R_ARM_THM_XPC22,
17: R_ARM_TLS_DTPMOD32,
18: R_ARM_TLS_DTPOFF32,
19: R_ARM_TLS_TPOFF32,
20: R_ARM_COPY,
21: R_ARM_GLOB_DAT,
22: R_ARM_JUMP_SLOT,
23: R_ARM_RELATIVE,
# 24: R_ARM_GOTOFF,
# 25: R_ARM_BASE_PREL,
# 26: R_ARM_GOT_BREL,
# 27: R_ARM_PLT32,
28: R_ARM_CALL,
29: R_ARM_JUMP24,
30: R_ARM_THM_JUMP24,
# 31: R_ARM_BASE_ABS,
# 32: R_ARM_ALU_PCREL_7_0,
# 33: R_ARM_ALU_PCREL_15_8,
# 34: R_ARM_ALU_PCREL_23_15,
# 35: R_ARM_LDR_SBREL_11_0_NC,
# 36: R_ARM_ALU_SBREL_19_12_NC,
# 37: R_ARM_ALU_SBREL_27_20_CK,
# 38: R_ARM_TARGET1,
# 39: R_ARM_SBREL31,
# 40: R_ARM_V4BX,
# 41: R_ARM_TARGET2,
42: R_ARM_PREL31,
43: R_ARM_MOVW_ABS_NC,
44: R_ARM_MOVT_ABS,
# 45: R_ARM_MOVW_PREL_NC,
# 46: R_ARM_MOVT_PREL,
47: R_ARM_THM_MOVW_ABS_NC,
48: R_ARM_THM_MOVT_ABS,
# 49: R_ARM_THM_MOVW_PREL_NC,
# 50: R_ARM_THM_MOVT_PREL,
51: R_ARM_THM_JUMP19,
52: R_ARM_THM_JUMP6,
# 53: R_ARM_THM_ALU_PREL_11_0,
# 54: R_ARM_THM_PC12,
55: R_ARM_ABS32_NOI,
56: R_ARM_REL32_NOI,
# 57: R_ARM_ALU_PC_G0_NC,
# 58: R_ARM_ALU_PC_G0,
# 59: R_ARM_ALU_PC_G1_NC,
# 60: R_ARM_ALU_PC_G1,
# 61: R_ARM_ALU_PC_G2,
# 62: R_ARM_LDR_PC_G1,
# 63: R_ARM_LDR_PC_G2,
# 64: R_ARM_LDRS_PC_G0,
# 65: R_ARM_LDRS_PC_G1,
# 66: R_ARM_LDRS_PC_G2,
# 67: R_ARM_LDC_PC_G0,
# 68: R_ARM_LDC_PC_G1,
# 69: R_ARM_LDC_PC_G2,
# 70: R_ARM_ALU_SB_G0_NC,
# 71: R_ARM_ALU_SB_G0,
# 72: R_ARM_ALU_SB_G1_NC,
# 73: R_ARM_ALU_SB_G1,
# 74: R_ARM_ALU_SB_G2,
# 75: R_ARM_LDR_SB_G0,
# 76: R_ARM_LDR_SB_G1,
# 77: R_ARM_LDR_SB_G2,
# 78: R_ARM_LDRS_SB_G0,
# 79: R_ARM_LDRS_SB_G1,
# 80: R_ARM_LDRS_SB_G2,
# 81: R_ARM_LDC_SB_G0,
# 82: R_ARM_LDC_SB_G1,
# 83: R_ARM_LDC_SB_G2,
# 84: R_ARM_MOVW_BREL_NC,
# 85: R_ARM_MOVT_BREL,
# 86: R_ARM_MOVW_BREL,
# 87: R_ARM_THM_MOVW_BREL_NC,
# 88: R_ARM_THM_MOVT_BREL,
# 89: R_ARM_THM_MOVW_BREL,
# 90: R_ARM_TLS_GOTDESC,
# 91: R_ARM_TLS_CALL,
# 92: R_ARM_TLS_DESCSEQ,
# 93: R_ARM_THM_TLS_CALL,
# 94: R_ARM_PLT32_ABS,
# 95: R_ARM_GOT_ABS,
96: R_ARM_GOT_PREL,
# 97: R_ARM_GOT_BREL12,
# 98: R_ARM_GOTOFF12,
# 99: R_ARM_GOTRELAX,
# 100: R_ARM_GNU_VTENTRY,
# 101: R_ARM_GNU_VTINHERIT,
# 102: R_ARM_JUMP11,
# 103: R_ARM_THM_PC9,
# 104: R_ARM_TLS_GD32,
# 105: R_ARM_TLS_LDM32,
# 106: R_ARM_TLS_LDO32,
# 107: R_ARM_TLS_IE32,
# 108: R_ARM_TLS_LE32,
# 109: R_ARM_TLS_LDO12,
# 110: R_ARM_TLS_LE12,
# 111: R_ARM_TLS_IE12GP,
# 112-127: R_ARM_PRIVATE_<n>
# 128: R_ARM_ME_TOO,
# 129: R_ARM_THM_TLS_DESCSEQ16,
# 130: R_ARM_THM_TLS_DESCSEQ32,
# 131: R_ARM_THM_GOT_BREL12,
# 132: R_ARM_THM_ALU_ABS_G0_NC,
# 133: R_ARM_THM_ALU_ABS_G1_NC,
# 134: R_ARM_THM_ALU_ABS_G2_NC,
# 135: R_ARM_THM_ALU_ABS_G3,
# 136: R_ARM_THM_BF16,
# 137: R_ARM_THM_BF12,
# 138: R_ARM_THM_BF18,
}


__all__ = ("relocation_table_arm",)
Loading

0 comments on commit 14adcc5

Please sign in to comment.