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CHORE: Update code base to use AEDT 24.2 #713

Merged
merged 9 commits into from
Aug 19, 2024
11 changes: 9 additions & 2 deletions .github/workflows/ci_cd.yml
Original file line number Diff line number Diff line change
Expand Up @@ -253,10 +253,17 @@ jobs:
. .venv\Scripts\Activate.ps1
echo "PyEDB version is: $(python -c "from pyedb import __version__; print(); print(__version__)")"

- name: Install pyaedt
- name: Clone PyAEDT on main branch
uses: actions/checkout@v4
with:
repository: ansys/pyaedt
path: "external/pyaedt"
ref: "main"

- name: Install PyAEDT main branch version with its test dependencies
run: |
. .venv\Scripts\Activate.ps1
pip install pyaedt
pip install --no-cache-dir external/pyaedt[tests]

# Use environment variable to keep the doctree and avoid redundant build for PDF pages
- name: Create HTML documentation
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6 changes: 3 additions & 3 deletions doc/source/getting_started/quickcode.rst
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Expand Up @@ -22,7 +22,7 @@ This code shows how to use PyEDB to load an existing AEDB file into memory:

temp_folder = generate_unique_folder_name()
targetfile = downloads.download_file("edb/ANSYS-HSD_V1.aedb", destination=temp_folder)
edbapp = Edb(edbpath=targetfile, edbversion="2024.1")
edbapp = Edb(edbpath=targetfile, edbversion="2024.2")

Connect to EDB from a Python IDE
--------------------------------
Expand All @@ -41,7 +41,7 @@ Explicit PyEDB declaration and error management
from pyedb import Edb

edb_file = pyedb.layout_examples.ANSYS - HSD_V1.aedb
edb = Edb(edbversion="2024.1", edbpath=edb_file)
edb = Edb(edbversion="2024.2", edbpath=edb_file)


Variables
Expand All @@ -52,6 +52,6 @@ Variables
from pyedb import Edb

edb_file = pyedb.layout_examples.ANSYS - HSD_V1.aedb
edb = Edb(edbversion="2024.1", edbpath=edb_file)
edb = Edb(edbversion="2024.2", edbpath=edb_file)
edb["dim"] = "1mm" # design variable
edb["$dim"] = "1mm" # project variable
Original file line number Diff line number Diff line change
Expand Up @@ -16,14 +16,14 @@ This page shows how to build an signal integrity project.
import pyedb.misc.downloads as downloads

# Ansys release version
ansys_version = "2024.1"
ansys_version = "2024.2"

# download and copy the layout file from examples
temp_folder = generate_unique_folder_name()
targetfile = downloads.download_file("edb/ANSYS-HSD_V1.aedb", destination=temp_folder)

# load EDB
edbapp = Edb(edbpath=targetfile, edbversion="2024.1")
edbapp = Edb(edbpath=targetfile, edbversion="2024.2")

sim_setup = edbapp.new_simulation_configuration()
sim_setup.signal_nets = [
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4 changes: 2 additions & 2 deletions doc/source/user_guide/build_simulation_project/cutout.rst
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Expand Up @@ -18,14 +18,14 @@ This page shows how to clip a design based on net selection.


# Ansys release version
ansys_version = "2024.1"
ansys_version = "2024.2"

# download and copy the layout file from examples
temp_folder = generate_unique_folder_name()
targetfile = downloads.download_file("edb/ANSYS-HSD_V1.aedb", destination=temp_folder)

# load EDB
edbapp = Edb(edbpath=targetfile, edbversion="2024.1")
edbapp = Edb(edbpath=targetfile, edbversion="2024.2")

# select signal nets to evaluate the extent for clipping the layout
signal_nets = [
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Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@ This page shows how to create a resistor boundary on pins:

temp_folder = generate_unique_folder_name()
targetfile = downloads.download_file("edb/ANSYS-HSD_V1.aedb", destination=temp_folder)
edbapp = Edb(edbpath=targetfile, edbversion="2024.1")
edbapp = Edb(edbpath=targetfile, edbversion="2024.2")

pins = edbapp.components.get_pin_from_component("U1")
resistor = edbapp.siwave.create_resistor_on_pin(pins[302], pins[10], 40, "RST4000")
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Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ This page shows how to create an RLC boundary on pins.
# download and open EDB project
temp_folder = generate_unique_folder_name()
targetfile = downloads.download_file("edb/ANSYS-HSD_V1.aedb", destination=temp_folder)
edbapp = Edb(edbpath=targetfile, edbversion="2024.1")
edbapp = Edb(edbpath=targetfile, edbversion="2024.2")

# retrieve pins from ``U1`` component and ``1V0`` net
pins = edbapp.components.get_pin_from_component("U1", "1V0")
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2 changes: 1 addition & 1 deletion doc/source/user_guide/components/create_rlc_component.rst
Original file line number Diff line number Diff line change
Expand Up @@ -19,7 +19,7 @@ This page shows how to create an RLC component between pins:
# download and open EDB project
temp_folder = generate_unique_folder_name()
targetfile = downloads.download_file("edb/ANSYS-HSD_V1.aedb", destination=temp_folder)
edbapp = Edb(edbpath=targetfile, edbversion="2024.1")
edbapp = Edb(edbpath=targetfile, edbversion="2024.2")

# retrieving pins from component U1 and net 1V0
pins = edbapp.components.get_pin_from_component("U1", "1V0")
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Original file line number Diff line number Diff line change
Expand Up @@ -27,7 +27,7 @@ Load a layout

temp_folder = generate_unique_folder_name()
targetfile = downloads.download_file("edb/ANSYS-HSD_V1.aedb", destination=temp_folder)
edbapp = Edb(edbpath=targetfile, edbversion="2024.1")
edbapp = Edb(edbpath=targetfile, edbversion="2024.2")

Get statistics
~~~~~~~~~~~~~~
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@ This tutorial shows how to retrieve the layout size by getting the bounding box.

temp_folder = generate_unique_folder_name()
targetfile = downloads.download_file("edb/ANSYS-HSD_V1.aedb", destination=temp_folder)
edbapp = Edb(edbpath=targetfile, edbversion="2024.1")
edbapp = Edb(edbpath=targetfile, edbversion="2024.2")

edbapp.get_bounding_box()

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -18,7 +18,7 @@ This page shows how to retrieve pins and create a circuit port on a component.

temp_folder = generate_unique_folder_name()
targetfile = downloads.download_file("edb/ANSYS-HSD_V1.aedb", destination=temp_folder)
edbapp = Edb(edbpath=targetfile, edbversion="2024.1")
edbapp = Edb(edbpath=targetfile, edbversion="2024.2")

edbapp.siwave.create_circuit_port_on_net("U1", "1V0", "U1", "GND", 50, "test")
edbapp.components.get_pin_from_component("U1")
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Original file line number Diff line number Diff line change
Expand Up @@ -16,14 +16,14 @@ This page shows how to create an HFSS coaxial port on a component.
import pyedb.misc.downloads as downloads

# Ansys release version
ansys_version = "2024.1"
ansys_version = "2024.2"

# download and copy the layout file from examples
temp_folder = generate_unique_folder_name()
targetfile = downloads.download_file("edb/ANSYS-HSD_V1.aedb", destination=temp_folder)

# load EDB
edbapp = Edb(edbpath=targetfile, edbversion="2024.1")
edbapp = Edb(edbpath=targetfile, edbversion="2024.2")

edbapp.hfss.create_coax_port_on_component("U1", ["DDR4_DQS0_P", "DDR4_DQS0_N"])
edbapp.save_edb()
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Original file line number Diff line number Diff line change
Expand Up @@ -18,7 +18,7 @@ This page shows how to create current and voltage sources on a component.

temp_folder = generate_unique_folder_name()
targetfile = downloads.download_file("edb/ANSYS-HSD_V1.aedb", destination=temp_folder)
edbapp = Edb(edbpath=targetfile, edbversion="2024.1")
edbapp = Edb(edbpath=targetfile, edbversion="2024.2")

# create simple current source on ``U1`` component between ``USB3_D_N`` and ``GND`` nets
edbapp.siwave.create_current_source_on_net("U1", "USB3_D_N", "U1", "GND", 0.1, 0) != ""
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Original file line number Diff line number Diff line change
Expand Up @@ -16,14 +16,14 @@ This page shows how to create an edge port on a polygon and trace.
import pyedb.misc.downloads as downloads

# Ansys release version
ansys_version = "2024.1"
ansys_version = "2024.2"

# download and copy the layout file from examples
temp_folder = generate_unique_folder_name()
targetfile = downloads.download_file("edb/edb_edge_ports.aedb", destination=temp_folder)

# load EDB
edbapp = Edb(edbpath=targetfile, edbversion="2024.1")
edbapp = Edb(edbpath=targetfile, edbversion="2024.2")

# retrieve polygon list
poly_list = [
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Original file line number Diff line number Diff line change
Expand Up @@ -15,14 +15,14 @@ This page shows how to create a port between a pin and a layer.
import pyedb.misc.downloads as downloads

# Ansys release version
ansys_version = "2024.1"
ansys_version = "2024.2"

# download and copy the layout file from examples
temp_folder = generate_unique_folder_name()
targetfile = downloads.download_file("edb/ANSYS-HSD_V1.aedb", destination=temp_folder)

# load EDB
edbapp = Edb(edbpath=targetfile, edbversion="2024.1")
edbapp = Edb(edbpath=targetfile, edbversion="2024.2")

edbapp.siwave.create_port_between_pin_and_layer(
component_name="U1", pins_name="A27", layer_name="16_Bottom", reference_net="GND"
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2 changes: 1 addition & 1 deletion doc/source/user_guide/layer_stackup/layer_stackup.rst
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@ This page shows how edit a layer in the current layer stackup.

temp_folder = generate_unique_folder_name()
targetfile = downloads.download_file("edb/ANSYS-HSD_V1.aedb", destination=temp_folder)
edbapp = Edb(edbpath=targetfile, edbversion="2024.1")
edbapp = Edb(edbpath=targetfile, edbversion="2024.2")

# plot layer stackup in Matplotlib
edbapp.stackup.plot()
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2 changes: 1 addition & 1 deletion doc/source/user_guide/load_export_edb/loading_layout.rst
Original file line number Diff line number Diff line change
Expand Up @@ -19,7 +19,7 @@ start manipulating objects.

temp_folder = generate_unique_folder_name()
targetfile = downloads.download_file("edb/ANSYS-HSD_V1.aedb", destination=temp_folder)
edbapp = Edb(edbpath=targetfile, edbversion="2024.1")
edbapp = Edb(edbpath=targetfile, edbversion="2024.2")

.. image:: ../../resources/starting_load_edb.png
:width: 600
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4 changes: 2 additions & 2 deletions doc/source/user_guide/padstacks/set_all_antipads_value.rst
Original file line number Diff line number Diff line change
Expand Up @@ -15,14 +15,14 @@ This page shows how to edit a padstack definition, setting all anti-pad values t
import pyedb.misc.downloads as downloads

# Ansys release version
ansys_version = "2024.1"
ansys_version = "2024.2"

# download and copy the layout file from examples
temp_folder = generate_unique_folder_name()
targetfile = downloads.download_file("edb/ANSYS-HSD_V1.aedb", destination=temp_folder)

# load EDB
edbapp = Edb(edbpath=targetfile, edbversion="2024.1")
edbapp = Edb(edbpath=targetfile, edbversion="2024.2")

# sets all anti-pads value to zero
edbapp.padstacks.set_all_antipad_value(0.0)
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Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@ This page shows how to create and set up a SIwave SYZ analysis.

temp_folder = generate_unique_folder_name()
targetfile = downloads.download_file("edb/ANSYS-HSD_V1.aedb", destination=temp_folder)
edbapp = Edb(edbpath=targetfile, edbversion="2024.1")
edbapp = Edb(edbpath=targetfile, edbversion="2024.2")

# Add SIwave SYZ analysis
edbapp.siwave.add_siwave_syz_analysis(
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Original file line number Diff line number Diff line change
Expand Up @@ -15,14 +15,14 @@ This page shows how to set up an HFSS simulation.
import pyedb.misc.downloads as downloads

# Ansys release version
ansys_version = "2024.1"
ansys_version = "2024.2"

# download and copy the layout file from examples
temp_folder = generate_unique_folder_name()
targetfile = downloads.download_file("edb/ANSYS-HSD_V1.aedb", destination=temp_folder)

# load EDB
edbapp = Edb(edbpath=targetfile, edbversion="2024.1")
edbapp = Edb(edbpath=targetfile, edbversion="2024.2")

# create HFSS simulation setup
setup1 = edbapp.create_hfss_setup("setup1")
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2 changes: 1 addition & 1 deletion doc/source/user_guide/use_design_variables.rst
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@ This page shows how to define design variables for use by EDB.

temp_folder = generate_unique_folder_name()
targetfile = downloads.download_file("edb/ANSYS-HSD_V1.aedb", destination=temp_folder)
edbapp = Edb(edbpath=targetfile, edbversion="2024.1")
edbapp = Edb(edbpath=targetfile, edbversion="2024.2")

# adding design variable
edbapp.add_design_variable("my_variable", "1mm")
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4 changes: 2 additions & 2 deletions examples/legacy_pyaedt_integration/03_5G_antenna_example.py
Original file line number Diff line number Diff line change
Expand Up @@ -94,7 +94,7 @@ def points(self):
tmpfold = tempfile.gettempdir()
aedb_path = os.path.join(tmpfold, generate_unique_name("pcb") + ".aedb")
print(aedb_path)
edb = pyedb.Edb(edbpath=aedb_path, edbversion="2024.1")
edb = pyedb.Edb(edbpath=aedb_path, edbversion="2024.2")

# ## Add stackup layers
#
Expand Down Expand Up @@ -226,7 +226,7 @@ def points(self):
# Launch HFSS 3D Layout and open EDB.

h3d = Hfss3dLayout(
projectname=aedb_path, specified_version="2024.1", new_desktop_session=True, non_graphical=non_graphical
projectname=aedb_path, specified_version="2024.2", new_desktop_session=True, non_graphical=non_graphical
)

# ## Plot geometry
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -87,8 +87,8 @@ def points(self):
temp_dir = tempfile.TemporaryDirectory(suffix=".ansys")
aedb_path = os.path.join(temp_dir.name, "linear_array.aedb")

# Select EDB version (change it manually if needed, e.g. "2024.1")
edb_version = "2024.1"
# Select EDB version (change it manually if needed, e.g. "2024.2")
edb_version = "2024.2"
print(f"EDB version: {edb_version}")

# Create an instance of the Edb class.
Expand Down Expand Up @@ -246,7 +246,7 @@ def points(self):
h3d = pyaedt.Hfss(
projectname="Demo_3DComp",
designname="Linear_Array",
specified_version="2024.1",
specified_version="2024.2",
new_desktop_session=True,
non_graphical=non_graphical,
close_on_exit=True,
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33 changes: 20 additions & 13 deletions examples/legacy_pyaedt_integration/04_edb_parametrized_design.py
Original file line number Diff line number Diff line change
Expand Up @@ -33,8 +33,8 @@
temp_dir = tempfile.TemporaryDirectory(suffix=".ansys")
aedb_path = os.path.join(temp_dir.name, "pcb.aedb")

# Select EDB version (change it manually if needed, e.g. "2024.1")
edb_version = "2024.1"
# Select EDB version (change it manually if needed, e.g. "2024.2")
edb_version = "2024.2"
print(f"EDB version: {edb_version}")

edb = pyedb.Edb(edbpath=aedb_path, edbversion=edb_version)
Expand Down Expand Up @@ -206,21 +206,28 @@

# Create the wave ports

edb.hfss.create_differential_wave_port(
p1 = edb.hfss.create_differential_wave_port(
trace_p[0].id,
["0.0", "($ms_width+$ms_spacing)/2"],
trace_n[0].id,
["0.0", "-($ms_width+$ms_spacing)/2"],
"wave_port_1",
)
edb.hfss.create_differential_wave_port(

pos_p1 = p1[1].terminals[0].name
neg_p1 = p1[1].terminals[1].name

p2 = edb.hfss.create_differential_wave_port(
trace_p[2].id,
["$pcb_len", "($ms_width+$ms_spacing)/2"],
trace_n[2].id,
["$pcb_len", "-($ms_width + $ms_spacing)/2"],
"wave_port_2",
)

pos_p2 = p2[1].terminals[0].name
neg_p2 = p2[1].terminals[1].name

# Draw a conducting rectangle on the ground layers.

gnd_poly = [
Expand Down Expand Up @@ -287,10 +294,10 @@
# Open the project in HFSS 3D Layout.

h3d = pyaedt.Hfss3dLayout(
projectname=aedb_path,
specified_version="2024.1",
project=aedb_path,
version=edb_version,
non_graphical=non_graphical,
new_desktop_session=True,
new_desktop=True,
)

# ## Add HFSS simulation setup
Expand All @@ -302,12 +309,12 @@
setup.props["AdaptiveSettings"]["SingleFrequencyDataList"]["AdaptiveFrequencyData"]["MaxPasses"] = 3

h3d.create_linear_count_sweep(
setupname=setup.name,
setup=setup.name,
unit="GHz",
freqstart=0,
freqstop=10,
start_frequency=0,
stop_frequency=10,
num_of_freq_points=1001,
sweepname="sweep1",
name="sweep1",
sweep_type="Interpolating",
interpolation_tol_percent=1,
interpolation_max_solutions=255,
Expand All @@ -319,8 +326,8 @@
# Define the differential pairs to used to calculate differential and common mode
# s-parameters.

h3d.set_differential_pair(diff_name="In", positive_terminal="wave_port_1:T1", negative_terminal="wave_port_1:T2")
h3d.set_differential_pair(diff_name="Out", positive_terminal="wave_port_2:T1", negative_terminal="wave_port_2:T2")
h3d.set_differential_pair(differential_mode="In", assignment=pos_p1, reference=neg_p1)
h3d.set_differential_pair(differential_mode="Out", assignment=pos_p2, reference=neg_p2)

# Solve the project.

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4 changes: 2 additions & 2 deletions examples/legacy_pyaedt_integration/09_Configuration.py
Original file line number Diff line number Diff line change
Expand Up @@ -32,8 +32,8 @@
# Launch the ``pyedb.Edb`` class using EDB 2023 R2. Length units are SI.

# +
# Select EDB version (change it manually if needed, e.g. "2024.1")
edb_version = "2024.1"
# Select EDB version (change it manually if needed, e.g. "2024.2")
edb_version = "2024.2"
print(f"EDB version: {edb_version}")

edbapp = pyedb.Edb(target_aedb, edbversion=edb_version)
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