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ARROW-11905: [C++] Fix SIMD detection on macOS #9657

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@pitrou pitrou commented Mar 8, 2021

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pitrou commented Mar 8, 2021

@jonkeane @uwe I don't know if you can easily test this on a x86 Mac.

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jonkeane commented Mar 8, 2021

👀

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jonkeane commented Mar 8, 2021

It works! Thanks

This is with the R code from #9641, but c++ from this branch:

jkeane@het r % R -e "arrow:::runtime_info()"
> arrow:::runtime_info()
[1] "avx" "avx"
> 
jkeane@het r % ARROW_USER_SIMD_LEVEL=sse4_2 R -e "arrow:::runtime_info()"
> arrow:::runtime_info()
[1] "sse4_2" "avx"   
> 

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pitrou commented Mar 8, 2021

What CPU do you have, by the way?

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jonkeane commented Mar 8, 2021

On the system I ran that I've got an Intel Xeon CPU E5-1650 v2

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pitrou commented Mar 8, 2021

Indeed, it doesn't have AVX2. Thank you!

{"hw.optional.avx512cd", AVX512CD},
{"hw.optional.avx512dq", AVX512DQ},
{"hw.optional.avx512bw", AVX512BW},
{"hw.optional.avx512vl", AVX512VL},
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Also add M1 arm64 flags?
{"hw.optional.neon", ASIMD}
I haven't tested this flag myself, just references golang/go#42747 (comment)

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Can do :-) By the way, is there a difference between "Neon" and "ASIMD"?

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Also, here are the available values on a M1:
https://gist.github.com/pitrou/fa1527038fea2d7a4cf367ecba7a2d2c

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Per my knowledge, NEON exists since 32 bit Arm, and ASIMD extends it to 64 bit system, with additional instructions and wider registers. ASIMD should be the correct term for Arm64 world, but obviously NEON is well known and widely used.

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Double checked with an expert from Arm. Actually Neon == Advanced SIMD.

From Arm Architecture Reference Manual (ArmARM):
The Advanced SIMD architecture, its associated implementations, and supporting software, are commonly referred to as NEON™ technology".

Neon was the codename that became public and more commonly used than the "proper name" (Advanced SIMD).

@pitrou pitrou force-pushed the ARROW-11905-macos-simd-detect branch from 16e8abf to a397fc3 Compare March 9, 2021 09:48
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xhochy commented Mar 9, 2021

On an M1 I get the following output for a397fc3cbebf44f0e0b3bd1e3eccfbd69eb507eb

In [2]: pa.runtime_info()
../src/arrow/util/cpu_info.cc:92: IOError: sysctlbyname failed for 'hw.optional.sse4_2'. Detail: [errno 45] Operation not supported
../src/arrow/util/cpu_info.cc:92: IOError: sysctlbyname failed for 'hw.optional.avx1_0'. Detail: [errno 45] Operation not supported
../src/arrow/util/cpu_info.cc:92: IOError: sysctlbyname failed for 'hw.optional.avx2_0'. Detail: [errno 45] Operation not supported
../src/arrow/util/cpu_info.cc:92: IOError: sysctlbyname failed for 'hw.optional.bmi1'. Detail: [errno 45] Operation not supported
../src/arrow/util/cpu_info.cc:92: IOError: sysctlbyname failed for 'hw.optional.bmi2'. Detail: [errno 45] Operation not supported
../src/arrow/util/cpu_info.cc:92: IOError: sysctlbyname failed for 'hw.optional.avx512f'. Detail: [errno 45] Operation not supported
../src/arrow/util/cpu_info.cc:92: IOError: sysctlbyname failed for 'hw.optional.avx512cd'. Detail: [errno 45] Operation not supported
../src/arrow/util/cpu_info.cc:92: IOError: sysctlbyname failed for 'hw.optional.avx512dq'. Detail: [errno 45] Operation not supported
../src/arrow/util/cpu_info.cc:92: IOError: sysctlbyname failed for 'hw.optional.avx512bw'. Detail: [errno 45] Operation not supported
../src/arrow/util/cpu_info.cc:92: IOError: sysctlbyname failed for 'hw.optional.avx512vl'. Detail: [errno 45] Operation not supported
../src/arrow/util/cpu_info.cc:92: IOError: sysctlbyname failed for 'hw.l3cachesize'. Detail: [errno 22] Invalid argument
Out[2]: RuntimeInfo(simd_level='none', detected_simd_level='none')

jonkeane uwe I don't know if you can easily test this on a x86 Mac.

Different Uwe in that handle ;)

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pitrou commented Mar 9, 2021

Thank you @xhochy .
The joke is that ENOTSUP isn't mentioned in Apple's own manual page...

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pitrou commented Mar 9, 2021

Also, can you try under Rosetta?

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xhochy commented Mar 9, 2021

Thank you @xhochy .
The joke is that ENOTSUP isn't mentioned in Apple's own manual page...

Also not mentioned on the manpage on the actual system. In general, I have the feeling that near to none of the internal workings / changes of macos-on-M1 vs macos-on-Intel has been published yet.

@pitrou pitrou force-pushed the ARROW-11905-macos-simd-detect branch from 0d67690 to 662182a Compare March 9, 2021 12:04
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xhochy commented Mar 9, 2021

For 662182a:

Rosetta 2:

In [2]: pa.runtime_info()
Out[2]: RuntimeInfo(simd_level='sse4_2', detected_simd_level='sse4_2')

Native:

In [2]: pa.runtime_info()
Out[2]: RuntimeInfo(simd_level='none', detected_simd_level='none')

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pitrou commented Mar 9, 2021

Ok, thank you. So it seems to work now. I'll wait for CI and then merge.

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xhochy commented Mar 9, 2021

Shouldn't native show neon?

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pitrou commented Mar 9, 2021

simd_level corresponds to the values allowed in ARROW_USER_SIMD_LEVEL. Currently we don't have dynamic dispatch for ARM64 (and I don't think we allow compiling with Neon disabled).

@pitrou pitrou closed this in e7c47ba Mar 9, 2021
@pitrou pitrou deleted the ARROW-11905-macos-simd-detect branch March 9, 2021 13:46
GeorgeAp pushed a commit to sirensolutions/arrow that referenced this pull request Jun 7, 2021
Closes apache#9657 from pitrou/ARROW-11905-macos-simd-detect

Authored-by: Antoine Pitrou <[email protected]>
Signed-off-by: Antoine Pitrou <[email protected]>
michalursa pushed a commit to michalursa/arrow that referenced this pull request Jun 13, 2021
Closes apache#9657 from pitrou/ARROW-11905-macos-simd-detect

Authored-by: Antoine Pitrou <[email protected]>
Signed-off-by: Antoine Pitrou <[email protected]>
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