✨ SiDB Operational Domain Computation

[marcelwa]

Description

This PR adds several functions to compute the Operational Domain of a given SiDB Layout. The operational domain is the set of all parameter combinations for which the layout is logically operational. Logical operation is defined as the layout implementing a given truth table.

To this end, this PR proposes four operational domain computation algorithms:

• Grid Search: Exhaustively enumerates the given parameter range while sampling every point.
• Random Sampling: Samples a given number of uniformly distributed random points in the parameter range.
• Flood Fill: Samples randomly and expands from the operational points to only explore the operational area.
• Contour Tracing: Samples randomly and traces the contour, i.e., the edge of the operational area.

Furthermore, this PR adds a couple of utilities:

• Detect BDL Pairs: An algorithm to match SiDBs in a layout into pairs.
• BDL Input Iterator: An iterator that can toggle through input combinations of a given SiDB layout.

Checklist:

• The pull request only contains commits that are related to it.
• I have added appropriate tests and documentation.
• I have made sure that all CI jobs on GitHub pass.
• The pull request introduces no new warnings and follows the project's style guidelines.

[marcelwa]

@Drewniok as you can see, this is WIP code, but I thought I assign you for an early review to keep the workload small.

[codecov]

Codecov Report

Patch coverage: 97.18% and project coverage change: +0.09% 🎉

Comparison is base (c5812a1) 95.02% compared to head (9a7b3b3) 95.12%.

Additional details and impacted files

@@            Coverage Diff             @@
##             main     #255      +/-   ##
==========================================
+ Coverage   95.02%   95.12%   +0.09%     
==========================================
  Files          90       95       +5     
  Lines        8550     8965     +415     
==========================================
+ Hits         8125     8528     +403     
- Misses        425      437      +12     

Files Changed	Coverage Δ
...de/fiction/algorithms/simulation/sidb/quicksim.hpp	97.33% <ø> (-0.04%)	⬇️
include/fiction/technology/cell_technologies.hpp	100.00% <ø> (ø)
include/fiction/layouts/cell_level_layout.hpp	98.91% <80.00%> (-1.09%)	⬇️
include/fiction/io/write_operational_domain.hpp	94.11% <94.11%> (ø)
.../algorithms/simulation/sidb/operational_domain.hpp	95.81% <95.81%> (ø)
.../fiction/algorithms/iter/aspect_ratio_iterator.hpp	100.00% <100.00%> (ø)
...ude/fiction/algorithms/iter/bdl_input_iterator.hpp	100.00% <100.00%> (ø)
...hms/simulation/sidb/can_positive_charges_occur.hpp	100.00% <100.00%> (ø)
...lgorithms/simulation/sidb/critical_temperature.hpp	94.35% <100.00%> (ø)
...on/algorithms/simulation/sidb/detect_bdl_pairs.hpp	100.00% <100.00%> (ø)
... and 10 more

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[Drewniok]

Thank you for this new function! It will help us a lot.

[Drewniok]

LGTM! Thanks for adding more documentation.

[marcelwa]

@Drewniok Thinking about this more, it probably makes sense to check for a lower distance threshold as well, since we don't want adjacent dots of, e.g., atomic wires to be paired up, right?

[Drewniok]

@Drewniok Thinking about this more, it probably makes sense to check for a lower distance threshold as well, since we don't want adjacent dots of, e.g., atomic wires to be paired up, right?

@marcelwa That's a good point! I was also worried about this before. However, I thought that this should not be a problem since we have the flags to only collect for example input cells.

I see what you mean. Indeed, for an atomic wire with for example 3 BDL pairs, we would detect 5 pairs, right? (assuming we use 2 nm by default)

[marcelwa]

@marcelwa That's a good point! I was also worried about this before. However, I thought that this should not be a problem since we have the flags to only collect for example input cells.

Yes, the current algorithm focuses on cells that are flagged with the input label. Two things here, though: (1) Why would we assume that a user would not "misflag" cells or put cells too close together, even if it is accidental? (2) The data type bdl_pair is generic and can store arbitrary BDL pairs. Hence, another algorithm can be thought of that collects regular BDL pairs. And that one would also make use of the spacing thresholds.

I see what you mean. Indeed, for an atomic wire with for example 3 BDL pairs, we would detect 5 pairs, right? (assuming we use 2 nm by default)

I'm not sure if I understand this right. In the current algorithm, each SiDB can only appear in a single pair. It cannot be matched multiple times.

[Drewniok]

@marcelwa That's a good point! I was also worried about this before. However, I thought that this should not be a problem since we have the flags to only collect for example input cells.

Yes, the current algorithm focuses on cells that are flagged with the input label. Two things here, though: (1) Why would we assume that a user would not "misflag" cells or put cells too close together, even if it is accidental? (2) The data type bdl_pair is generic and can store arbitrary BDL pairs. Hence, another algorithm can be thought of that collects regular BDL pairs. And that one would also make use of the spacing thresholds.

Yes, these are good thoughts.
1.) That's a good point. Then we should rather go down to 1 nm as default (we should also keep in mind that a look-up table could be useful because the threashold value also depends on the µ value). But I guess it is really hard to provide the correct result for every arbitrary case where the user misflags some DBs.

Let's take this OR gate where the two input BDLs are a little closer than normal. If a user doesn't mark them correctly, it's really hard to correctly detect the correct input BDL pair.

2.) What is the definition of a regular BDL pair?

I see what you mean. Indeed, for an atomic wire with for example 3 BDL pairs, we would detect 5 pairs, right? (assuming we use 2 nm by default)

I'm not sure if I understand this right. In the current algorithm, each SiDB can only appear in a single pair. It cannot be matched multiple times.

Sorry, I was wrong.

[marcelwa]

Yes, these are good thoughts.
1.) That's a good point. Then we should rather go down to 1 nm as default (we should also keep in mind that a look-up table could be useful because the threashold value also depends on the µ value). But I guess it is really hard to provide the correct result for every arbitrary case where the user misflags some DBs.

I don't think I understand what you mean by the look-up table idea. Could you elaborate on that, please? Regarding 1 nm as the upper bound: I think that could be too narrow. In the Bestagon gate library, for instance, input/output BDL pairs are ~1.086 nm apart. Given this information, what do you think would be a good upper bound? 1.5 nm maybe?

2.) What is the definition of a regular BDL pair?

In my understanding, any two dots that are close enough together such that they are likely to share a charge. In a BDL wire for instance you have always two dots a bit closer together and then a little bit of space and then the next two dots. Those would be regular BDL pairs while the first and last in the row would be input/output BDL pairs, respectively.

[Drewniok]

Yes, these are good thoughts.
1.) That's a good point. Then we should rather go down to 1 nm as default (we should also keep in mind that a look-up table could be useful because the threashold value also depends on the µ value). But I guess it is really hard to provide the correct result for every arbitrary case where the user misflags some DBs.

I don't think I understand what you mean by the look-up table idea. Could you elaborate on that, please? Regarding 1 nm as the upper bound: I think that could be too narrow. In the Bestagon gate library, for instance, input/output BDL pairs are ~1.086 nm apart. Given this information, what do you think would be a good upper bound? 1.5 nm maybe?

I think the look-up table is a bit overkill at the moment. I was just thinking that maybe we could store some threashold values for different µ values. But as I said, I think this is not that important yet, since we mostly investigate layouts at around µ ~ -0.3 eV. I agree, let's start with 1.5 nm as an upper limit.
Here, I have a wire with BDL pair length ~ 1.9 nm, but µ = -0.15 eV.

2.) What is the definition of a regular BDL pair?

In my understanding, any two dots that are close enough together such that they are likely to share a charge. In a BDL wire for instance you have always two dots a bit closer together and then a little bit of space and then the next two dots. Those would be regular BDL pairs while the first and last in the row would be input/output BDL pairs, respectively.

[Drewniok]

Many thanks, LGTM! This is a super cool and convienent contribution.

[github-actions]

clang-tidy made some suggestions

[github-actions]

clang-tidy made some suggestions

[marcelwa]

clang-tidy does not make it through this PR anymore in 6 hours, which is the maximum runtime we get on free GitHub runners. Therefore, I will merge this now regardless of the failing CI. There is not much we can do about it, unfortunately. As we saw before, it is mostly clean anyway.