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🎨 support cds as input for all simulators #310

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merged 14 commits into from
Oct 12, 2023

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Drewniok
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Description

This PR adds charge_distribution_surface (cds) as a possible input for all simulators.

Checklist:

  • The pull request only contains commits that are related to it.
  • I have added appropriate tests and documentation.
  • I have made sure that all CI jobs on GitHub pass.
  • The pull request introduces no new warnings and follows the project's style guidelines.

@Drewniok Drewniok added the enhancement New feature or request label Oct 10, 2023
@Drewniok Drewniok self-assigned this Oct 10, 2023
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clang-tidy made some suggestions

include/fiction/algorithms/simulation/sidb/quickexact.hpp Outdated Show resolved Hide resolved
include/fiction/algorithms/simulation/sidb/quickexact.hpp Outdated Show resolved Hide resolved
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codecov bot commented Oct 10, 2023

Codecov Report

All modified lines are covered by tests ✅

Comparison is base (930b8cb) 96.00% compared to head (5229b00) 96.01%.

Additional details and impacted files
@@           Coverage Diff           @@
##             main     #310   +/-   ##
=======================================
  Coverage   96.00%   96.01%           
=======================================
  Files         100      100           
  Lines        9916     9935   +19     
=======================================
+ Hits         9520     9539   +19     
  Misses        396      396           
Files Coverage Δ
...hms/simulation/sidb/can_positive_charges_occur.hpp 100.00% <100.00%> (ø)
...lation/sidb/exhaustive_ground_state_simulation.hpp 94.73% <100.00%> (ø)
.../fiction/algorithms/simulation/sidb/quickexact.hpp 98.85% <100.00%> (+0.05%) ⬆️
...de/fiction/algorithms/simulation/sidb/quicksim.hpp 98.70% <100.00%> (ø)
...fiction/technology/charge_distribution_surface.hpp 99.39% <100.00%> (+<0.01%) ⬆️

☔ View full report in Codecov by Sentry.
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Comment on lines +1200 to +1203
TEMPLATE_TEST_CASE(
"QuickExact simulation of a 3 DB Wire", "[quickexact]",
(cell_level_layout<sidb_technology, clocked_layout<cartesian_layout<siqad::coord_t>>>),
(charge_distribution_surface<cell_level_layout<sidb_technology, clocked_layout<cartesian_layout<siqad::coord_t>>>>))

Check warning

Code scanning / CodeQL

Poorly documented large function Warning test

Poorly documented function: fewer than 2% comments for a function of 208 lines.
Comment on lines +533 to +536
TEMPLATE_TEST_CASE(
"QuickSim simulation of an layout comprising of 13 SiDBs", "[quicksim]",
(cell_level_layout<sidb_technology, clocked_layout<cartesian_layout<siqad::coord_t>>>),
(charge_distribution_surface<cell_level_layout<sidb_technology, clocked_layout<cartesian_layout<siqad::coord_t>>>>))

Check warning

Code scanning / CodeQL

Poorly documented large function Warning test

Poorly documented function: fewer than 2% comments for a function of 105 lines.
Comment on lines +149 to +152
TEMPLATE_TEST_CASE(
"ExGS simulation of a Y-shape SiDB OR gate with input 01", "[exhaustive-ground-state-simulation]",
(cell_level_layout<sidb_technology, clocked_layout<cartesian_layout<siqad::coord_t>>>),
(charge_distribution_surface<cell_level_layout<sidb_technology, clocked_layout<cartesian_layout<siqad::coord_t>>>>))

Check warning

Code scanning / CodeQL

Poorly documented large function Warning test

Poorly documented function: fewer than 2% comments for a function of 150 lines.
Comment on lines +1032 to +1035
TEMPLATE_TEST_CASE(
"QuickExact simulation of a Y-shape SiDB OR gate with input 01", "[quickexact]",
(cell_level_layout<sidb_technology, clocked_layout<cartesian_layout<siqad::coord_t>>>),
(charge_distribution_surface<cell_level_layout<sidb_technology, clocked_layout<cartesian_layout<siqad::coord_t>>>>))

Check warning

Code scanning / CodeQL

Poorly documented large function Warning test

Poorly documented function: fewer than 2% comments for a function of 167 lines.
Comment on lines +160 to +163
TEMPLATE_TEST_CASE(
"QuickSim simulation of an SiDB layout comprising of 10 SiDBs with varying thread counts", "[quicksim]",
(cell_level_layout<sidb_technology, clocked_layout<cartesian_layout<siqad::coord_t>>>),
(charge_distribution_surface<cell_level_layout<sidb_technology, clocked_layout<cartesian_layout<siqad::coord_t>>>>))

Check warning

Code scanning / CodeQL

Poorly documented large function Warning test

Poorly documented function: fewer than 2% comments for a function of 106 lines.
Comment on lines +735 to +738
TEMPLATE_TEST_CASE(
"QuickSim simulation of a Y-shape SiDB OR gate with input 01", "[ExGS]",
(cell_level_layout<sidb_technology, clocked_layout<cartesian_layout<siqad::coord_t>>>),
(charge_distribution_surface<cell_level_layout<sidb_technology, clocked_layout<cartesian_layout<siqad::coord_t>>>>))

Check warning

Code scanning / CodeQL

Poorly documented large function Warning test

Poorly documented function: fewer than 2% comments for a function of 162 lines.
@marcelwa
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Lot's of false positives for some reason by the clang-tidy action regarding the cppcoreguidelines-init-variables check. I'm wondering what's up with that 🤔 @Drewniok could you please resolve all suggestions that are not applicable?

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clang-tidy made some suggestions

@Drewniok Drewniok merged commit ba63654 into cda-tum:main Oct 12, 2023
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2 participants