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✨ QuickCell: An Algorithm for Automatic Standard Cell Design #481
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Signed-off-by: GitHub Actions <[email protected]>
Signed-off-by: GitHub Actions <[email protected]>
# Conflicts: # bindings/pyfiction/pyfiction.cpp # cli/cmd/simulation/opdom.hpp # experiments/operational_domain/operational_domain_siqad.cpp # include/fiction/algorithms/simulation/sidb/operational_domain.hpp # test/algorithms/simulation/sidb/operational_domain.cpp
… scripts and added total runtime tracking
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clang-tidy made some suggestions
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@Drewniok can you please mark all conversations as resolved that are not applicable or are actually resolved? |
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# Conflicts: # bindings/pyfiction/include/pyfiction/algorithms/iter/bdl_input_iterator.hpp # bindings/pyfiction/include/pyfiction/algorithms/simulation/sidb/critical_temperature.hpp # bindings/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp # bindings/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp # bindings/pyfiction/test/algorithms/simulation/sidb/test_displacement_robustness_domain.py # include/fiction/algorithms/iter/bdl_input_iterator.hpp # include/fiction/algorithms/simulation/sidb/critical_temperature.hpp # include/fiction/algorithms/simulation/sidb/is_operational.hpp # include/fiction/technology/is_sidb_gate_design_impossible.hpp # test/algorithms/simulation/sidb/displacement_robustness_domain.cpp # test/utils/blueprints/layout_blueprints.hpp
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* @tparam CellType Cell type. | ||
*/ | ||
template <typename CellType> | ||
struct bdl_wire |
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warning: class 'bdl_wire' defines a copy constructor, a copy assignment operator, a move constructor and a move assignment operator but does not define a destructor [cppcoreguidelines-special-member-functions]
struct bdl_wire
^
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#include <pybind11/stl.h> | ||
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#include <vector> | ||
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warning: included header vector is not used directly [misc-include-cleaner]
* Destructor for bdl_wire. | ||
* | ||
*/ | ||
~bdl_wire() noexcept {} |
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warning: use '= default' to define a trivial destructor [hicpp-use-equals-default]
~bdl_wire() noexcept {} | |
~bdl_wire() noexcept = default; |
#include <fiction/algorithms/iter/bdl_input_iterator.hpp> | ||
#include <fiction/algorithms/simulation/sidb/detect_bdl_wires.hpp> | ||
#include <fiction/layouts/coordinates.hpp> | ||
#include <fiction/technology/cell_technologies.hpp> |
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warning: included header coordinates.hpp is not used directly [misc-include-cleaner]
#include <fiction/technology/cell_technologies.hpp> | |
#include <fiction/technology/cell_technologies.hpp> |
@@ -25,12 +27,23 @@ TEST_CASE("SiQAD OR gate", "[is-operational]") | |||
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const sidb_100_cell_clk_lyt_siqad lat{layout_or_gate}; | |||
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CHECK(is_operational(lat, std::vector<tt>{create_or_tt()}, | |||
is_operational_params{sidb_simulation_parameters{2, -0.30}}) | |||
CHECK(is_operational( |
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warning: no header providing "CHECK" is directly included [misc-include-cleaner]
CHECK(is_operational(
^
#include <fiction/types.hpp> | ||
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#include <cstdint> | ||
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using namespace fiction; | ||
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TEST_CASE("Random cube::coord_t layout generation", "[generate-random-sidb-layout]") | ||
TEST_CASE("Random cube::coord_t layout generation", "[random-sidb-layout-generator]") |
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warning: no header providing "TEST_CASE" is directly included [misc-include-cleaner]
test/algorithms/simulation/sidb/random_sidb_layout_generator.cpp:5:
+ #include "catch2/catch_test_macros.hpp"
@@ -53,7 +54,7 @@ | |||
} | |||
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TEMPLATE_TEST_CASE("integral_abs should compute the absolute value of a number of different integral types", | |||
"[integral_abs]", int8_t, int16_t, int32_t, int64_t, uint8_t, uint16_t, uint32_t, uint64_t) | |||
"[integral-abs]", int8_t, int16_t, int32_t, int64_t, uint8_t, uint16_t, uint32_t, uint64_t) |
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warning: no header providing "int8_t" is directly included [misc-include-cleaner]
test/utils/math_utils.cpp:9:
- #include <string>
+ #include <cstdint>
+ #include <string>
@@ -53,7 +54,7 @@ | |||
} | |||
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TEMPLATE_TEST_CASE("integral_abs should compute the absolute value of a number of different integral types", | |||
"[integral_abs]", int8_t, int16_t, int32_t, int64_t, uint8_t, uint16_t, uint32_t, uint64_t) | |||
"[integral-abs]", int8_t, int16_t, int32_t, int64_t, uint8_t, uint16_t, uint32_t, uint64_t) |
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warning: no header providing "uint16_t" is directly included [misc-include-cleaner]
"[integral-abs]", int8_t, int16_t, int32_t, int64_t, uint8_t, uint16_t, uint32_t, uint64_t)
^
@@ -53,7 +54,7 @@ | |||
} | |||
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TEMPLATE_TEST_CASE("integral_abs should compute the absolute value of a number of different integral types", | |||
"[integral_abs]", int8_t, int16_t, int32_t, int64_t, uint8_t, uint16_t, uint32_t, uint64_t) | |||
"[integral-abs]", int8_t, int16_t, int32_t, int64_t, uint8_t, uint16_t, uint32_t, uint64_t) |
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warning: no header providing "uint32_t" is directly included [misc-include-cleaner]
"[integral-abs]", int8_t, int16_t, int32_t, int64_t, uint8_t, uint16_t, uint32_t, uint64_t)
^
@@ -53,7 +54,7 @@ | |||
} | |||
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TEMPLATE_TEST_CASE("integral_abs should compute the absolute value of a number of different integral types", | |||
"[integral_abs]", int8_t, int16_t, int32_t, int64_t, uint8_t, uint16_t, uint32_t, uint64_t) | |||
"[integral-abs]", int8_t, int16_t, int32_t, int64_t, uint8_t, uint16_t, uint32_t, uint64_t) |
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warning: no header providing "uint64_t" is directly included [misc-include-cleaner]
"[integral-abs]", int8_t, int16_t, int32_t, int64_t, uint8_t, uint16_t, uint32_t, uint64_t)
^
@@ -53,7 +54,7 @@ | |||
} | |||
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TEMPLATE_TEST_CASE("integral_abs should compute the absolute value of a number of different integral types", | |||
"[integral_abs]", int8_t, int16_t, int32_t, int64_t, uint8_t, uint16_t, uint32_t, uint64_t) | |||
"[integral-abs]", int8_t, int16_t, int32_t, int64_t, uint8_t, uint16_t, uint32_t, uint64_t) |
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warning: no header providing "uint8_t" is directly included [misc-include-cleaner]
"[integral-abs]", int8_t, int16_t, int32_t, int64_t, uint8_t, uint16_t, uint32_t, uint64_t)
^
Description
This PR adds QuickCell, an algorithm for automatic standard cell design for SiDB logic that uses dedicated search space pruning techniques.
Checklist: