The new feature of verilator stops building procession

[LoveMyPillow]

Verilator has a new feature called "IMPLICTSTATIC warning", when a function is implictly static, in the version v5.006.
When I run the command make -f $RV_ROOT\tools\Makefile
The shell print
%Warning-IMPLICITSTATIC: /home/hiramhsu/W-VeeR/Cores-VeeR-EH1-main/testbench/dasm.svi:393:17: Function/task's lifetime implicitly set to static
And the building procession will be stopped because of these warnings.
I have to downgrade the version of verilator into v5.004 so that I can run the simulation.

[XavierJEsteve]

I've now encountered the same issue. Is it worth following the suggestions provided:
"Function/task's lifetime implicitly set to static : ... Suggest use 'function automatic' or 'function static' "
in order to maintain compatibility with future versions of Verilator?

[algrobman]

this is verilator bug - ask the tool developer to fix this. A verilog simulator supposed to support verilog standard which allows functions definitions without qualifiers. Verilator should issue Note and not warning, killing compilation, if they want.
Another way to fix this problem - to add -Wno-IMPLICITSTATIC compilation switch