Apply fixes after merging changes from caliptra-rtl #215
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Links to coverage and verification reports for this PR (#215) are available at https://chipsalliance.github.io/Cores-VeeR-EL2/ |
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What script is responsible for generating el2_pdef.vh? An important recent change was to convert 'bit' types to 'logic' for lint cleanliness. Is that change merged to the generator script? |
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design/ifu/el2_ifu_mem_ctl.sv
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| genvar i; | ||
| generate | ||
| for (i = 0; i < pt.ICACHE_NUM_WAYS; i = i + 1) begin | ||
| assign ic_debug_way[i] = (ic_debug_way_enc == i[1:0]); |
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| assign ic_debug_way[i] = (ic_debug_way_enc == i[1:0]); | |
| assign ic_debug_way[i] = (ic_debug_way_enc == i[1:0]); |
design/ifu/el2_ifu_mem_ctl.sv
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| for (i = 0; i < pt.ICACHE_NUM_WAYS; i = i + 1) begin | ||
| assign ic_debug_way[i] = (ic_debug_way_enc == i[1:0]); | ||
| end | ||
| endgenerate |
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| endgenerate | |
| endgenerate |
| for (i = 0; i < pt.ICACHE_NUM_WAYS; i = i + 1) begin | ||
| assign ic_debug_way[i] = (ic_debug_way_enc == i[1:0]); | ||
| end | ||
| endgenerate | ||
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| assign ic_debug_tag_wr_en[pt.ICACHE_NUM_WAYS-1:0] = {pt.ICACHE_NUM_WAYS{ic_debug_wr_en & ic_debug_tag_array}} & ic_debug_way[pt.ICACHE_NUM_WAYS-1:0] ; |
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| assign ic_debug_tag_wr_en[pt.ICACHE_NUM_WAYS-1:0] = {pt.ICACHE_NUM_WAYS{ic_debug_wr_en & ic_debug_tag_array}} & ic_debug_way[pt.ICACHE_NUM_WAYS-1:0] ; | |
| assign ic_debug_tag_wr_en[pt.ICACHE_NUM_WAYS-1:0] = {pt.ICACHE_NUM_WAYS{ic_debug_wr_en & ic_debug_tag_array}} & ic_debug_way[pt.ICACHE_NUM_WAYS-1:0] ; |
design/ifu/el2_ifu_mem_ctl.sv
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| (ic_debug_way_enc[0] == 1'b0) }; | ||
| genvar i; | ||
| generate | ||
| for (i = 0; i < pt.ICACHE_NUM_WAYS; i = i + 1) begin |
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All generate block statements must have a label [Style: generate-statements] [generate-label]
kiryk
changed the title
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Hi @calebofearth, the script that generates |
| @@ -1632,8 +1632,9 @@ assign ic_debug_rd_en = dec_tlu_ic_diag_pkt.icache_rd_valid ; | |||
| assign ic_debug_wr_en = dec_tlu_ic_diag_pkt.icache_wr_valid ; | |||
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| assign ic_debug_way[pt.ICACHE_NUM_WAYS-1:0] = {(ic_debug_way_enc[0] == 1'b1), | |||
| (ic_debug_way_enc[0] == 1'b0) }; | |||
| for (genvar i = 0; i < pt.ICACHE_NUM_WAYS; i = i + 1) begin : ic_debug_way_loop | |||
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All generate block labels must start with g_ or gen_ [Style: generate-constructs] [generate-label-prefix]
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Links to coverage and verification reports for this PR (#215) are available at https://chipsalliance.github.io/Cores-VeeR-EL2/ |
1 similar comment
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Links to coverage and verification reports for this PR (#215) are available at https://chipsalliance.github.io/Cores-VeeR-EL2/ |
This change:
design/el2_pdef.vhfile, which is generated by the flow,veer.configproduce parameter struct using logic type, instead of bit,