Extend CI matrix #64

Job	Run time
generate-config	10s
build-spike / Build Spike	7s
generate-code (riscv_arithmetic_basic_test)	1m 21s
generate-code (riscv_rand_instr_test)	1m 27s
generate-code (riscv_jump_stress_test)	1m 22s
generate-code (riscv_loop_test)	1m 18s
generate-code (riscv_rand_jump_test)	1m 48s
generate-code (riscv_mmu_stress_test)	1m 18s
generate-code (riscv_no_fence_test)	1m 18s
generate-code (riscv_illegal_instr_test)	1m 21s
generate-code (riscv_ebreak_test)	1m 28s
generate-code (riscv_ebreak_debug_mode_test)	1m 36s
generate-code (riscv_full_interrupt_test)	1m 51s
generate-code (riscv_unaligned_load_store_test)	1m 23s
generate-code (riscv_non_compressed_instr_test)	1m 52s
generate-code (riscv_hint_instr_test)	1m 18s
generate-code (riscv_pmp_test)	1m 20s
test-riscv (riscv_arithmetic_basic_test, uvm)	45s
test-riscv (riscv_rand_instr_test, uvm)	1m 18s
test-riscv (riscv_jump_stress_test, uvm)	59s
test-riscv (riscv_loop_test, uvm)	51s
test-riscv (riscv_rand_jump_test, uvm)	49s
test-riscv (riscv_mmu_stress_test, uvm)	50s
test-riscv (riscv_no_fence_test, uvm)	57s
test-riscv (riscv_illegal_instr_test, uvm)	1m 9s
test-riscv (riscv_ebreak_test, uvm)	50s
test-riscv (riscv_ebreak_debug_mode_test, uvm)	56s
test-riscv (riscv_full_interrupt_test, uvm)	56s
test-riscv (riscv_unaligned_load_store_test, uvm)	49s
test-riscv (riscv_non_compressed_instr_test, uvm)	1m 16s
test-riscv (riscv_hint_instr_test, uvm)	3m 53s
test-riscv (riscv_pmp_test, uvm)	50s
test-riscv (riscv_arithmetic_basic_test, pyflow)	2m 50s
	42m 16s

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