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Configurable initial register values #527

Merged
merged 27 commits into from
Jun 25, 2019
Merged

Configurable initial register values #527

merged 27 commits into from
Jun 25, 2019
+6,822 −5,240

Commits on Jun 25, 2019

  1. [skip ci] Extend Domain with number of synthesis options 

    This commit contains the core of PR #527. All the "boring" changes will
follow in the commit after this one.
    @martijnbastiaan
    martijnbastiaan committed Jun 25, 2019
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  2. [skip ci] Extend API changes to rest of clash-prelude

    @martijnbastiaan
    martijnbastiaan committed Jun 25, 2019
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  3. [skip ci] Implement synthesis domains in compiler

    @martijnbastiaan
    martijnbastiaan committed Jun 25, 2019
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  4. [skip ci] Implement synthesis domains in primitive definitions

    @martijnbastiaan
    martijnbastiaan committed Jun 25, 2019
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  5. [skip ci] Update clash-cosim

    @martijnbastiaan
    martijnbastiaan committed Jun 25, 2019
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  6. Fix testsuite

    @martijnbastiaan
    martijnbastiaan committed Jun 25, 2019
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  7. Add test for active low reset domain

    @martijnbastiaan
    martijnbastiaan committed Jun 25, 2019
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  8. Add test for multiple hidden clocks

    @martijnbastiaan
    martijnbastiaan committed Jun 25, 2019
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  9. Rename InitValue Undefined to Unknown

    @christiaanb @martijnbastiaan
    christiaanb authored and martijnbastiaan committed Jun 25, 2019
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  10. Make most memories configurable in the active edge

    @christiaanb @martijnbastiaan
    christiaanb authored and martijnbastiaan committed Jun 25, 2019
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  11. Make DDR and assert primitives edge-polymorphic

    @christiaanb @martijnbastiaan
    christiaanb authored and martijnbastiaan committed Jun 25, 2019
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  12. Add active-low reset support to DDR primitive

    @christiaanb @martijnbastiaan
    christiaanb authored and martijnbastiaan committed Jun 25, 2019
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  13. Have the testsuite succeed even with different System defaults

    @christiaanb @martijnbastiaan
    christiaanb authored and martijnbastiaan committed Jun 25, 2019
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  14. Fix VHDL delay primitive

    @christiaanb @martijnbastiaan
    christiaanb authored and martijnbastiaan committed Jun 25, 2019
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  15. Give delay a configurable power-up value

    @christiaanb @martijnbastiaan
    christiaanb authored and martijnbastiaan committed Jun 25, 2019
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  16. Apply clock to DUT in HOPrim.Map

    @christiaanb @martijnbastiaan
    christiaanb authored and martijnbastiaan committed Jun 25, 2019
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  17. Up version number to 0.9999 

    Reconfigurable powerup values warrent a new version number
    @martijnbastiaan
    martijnbastiaan committed Jun 25, 2019
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  18. Remove unused primitive 

    Co-Authored-By: Leon Schoorl <[email protected]>
    @martijnbastiaan @leonschoorl
    martijnbastiaan and leonschoorl committed Jun 25, 2019
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  19. Fix Tutorial haddock 

    Haddock will turn "Foo" into a link to the module Foo, even if such a 
module doesn't exist.

[skip ci]
    @leonschoorl @martijnbastiaan
    leonschoorl authored and martijnbastiaan committed Jun 25, 2019
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  20. Add type alias for Symbol (Domain)

    @martijnbastiaan
    martijnbastiaan committed Jun 25, 2019
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  21. Also add new default extensions to outputTest'

    @martijnbastiaan
    martijnbastiaan committed Jun 25, 2019
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  22. Minor style fixes

    @martijnbastiaan
    martijnbastiaan committed Jun 25, 2019
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  23. Remove domain singleton from Reset 

    Enable doesn't have it, so Reset should need it either.

Clock also contains a singleton, but it uses it for its Show instance.
    @leonschoorl @martijnbastiaan
    leonschoorl authored and martijnbastiaan committed Jun 25, 2019
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  24. Rename ~ISENABLED to ~ISALWAYSENABLED

    @martijnbastiaan
    martijnbastiaan committed Jun 25, 2019
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  25. Small doc fixes

    @martijnbastiaan
    martijnbastiaan committed Jun 25, 2019
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  26. Change ~ISRISING[n] to ~ACTIVEEDGE[edge][n]

    @martijnbastiaan
    martijnbastiaan committed Jun 25, 2019
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  27. Allow ~TAG to be used on Reset and Clock too

    @martijnbastiaan
    martijnbastiaan committed Jun 25, 2019
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