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GIT 1297af7d710acda27fb289277866e0bcd81c72c8 commit 10d4c6736ea6e6ff293dd588551270bca00ca45d Author: Petri Gynther <[email protected]> Date: Thu May 8 15:50:01 2014 -0700 Bluetooth: btusb: Add Broadcom patch RAM support After hardware reset, some BCM Bluetooth adapters obtain their initial firmware from OTPROM chip. Once this initial firmware is running, the firmware can be further upgraded over HCI interface with .hcd files provided by Broadcom. This is also known as "patch RAM" support. This change implements that. If the .hcd file is not found in /lib/firmware, BCM Bluetooth adapter continues to operate with the initial firmware. Sample kernel log: hotplug: sys=firmware act=add fw=brcm/BCM20702A0-0a5c-22be.hcd dev=... Bluetooth: hci0: BCM: patch brcm/BCM20702A0-0a5c-22be.hcd not found If the .hcd file is found, btusb driver pushes it to the BCM Bluetooth adapter and it starts using the new firmware. Sample kernel log: hotplug: sys=firmware act=add fw=brcm/BCM20702A0-0a5c-22be.hcd dev=... Bluetooth: hci0: BCM: patching hci_ver=06 hci_rev=1000 lmp_ver=06 lmp_subver=220e Bluetooth: hci0: BCM: firmware hci_ver=06 hci_rev=1389 lmp_ver=06 lmp_subver=220e Above, we can see that hci_rev goes from 1000 to 1389 as a result of the upgrade. Signed-off-by: Petri Gynther <[email protected]> Signed-off-by: Marcel Holtmann <[email protected]> commit 79bc7681c2880e57f07556263b862bbf383ad209 Author: Seungwon Jeon <[email protected]> Date: Fri May 9 07:02:33 2014 +0900 ARM: dts: disable MDMA1 node for exynos5420 This change places MDMA1 in disabled node for Exynos5420. If MDMA1 region is configured with secure mode, it makes the boot failure with the following on smdk5420 board. ("Unhandled fault: imprecise external abort (0x1406) at 0x00000000") Thus, arndale-octa board don't need to do the same thing anymore. Signed-off-by: Seungwon Jeon <[email protected]> Tested-by: Javi Merino <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit 88072246315301323b777465f5c9b643db87aff7 Author: Daniel Lezcano <[email protected]> Date: Fri May 9 06:57:35 2014 +0900 ARM: EXYNOS: Move the driver to drivers/cpuidle directory Signed-off-by: Daniel Lezcano <[email protected]> Reviewed-by: Viresh Kumar <[email protected]> Reviewed-by: Bartlomiej Zolnierkiewicz <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit 5695f45e38ec1a861551f7d1cd177b5e81984b83 Author: Daniel Lezcano <[email protected]> Date: Fri May 9 06:57:30 2014 +0900 ARM: EXYNOS: Cleanup all unneeded headers from cpuidle.c Signed-off-by: Daniel Lezcano <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit 17c643ecf1219cf8d3b375bdfdc377b9cbc372ae Author: Daniel Lezcano <[email protected]> Date: Fri May 9 06:56:29 2014 +0900 ARM: EXYNOS: Pass the AFTR callback to the platform_data No more dependency on the arch code. The platform_data field is used to set the PM callback as the other cpuidle drivers. Signed-off-by: Daniel Lezcano <[email protected]> Reviewed-by: Viresh Kumar <[email protected]> Reviewed-by: Bartlomiej Zolnierkiewicz <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit 7e4401689ed8c63cfb3f063107b1a07c58bb5830 Author: Daniel Lezcano <[email protected]> Date: Fri May 9 06:56:24 2014 +0900 ARM: EXYNOS: Move S5P_CHECK_SLEEP into pm.c This macro is only used there. Signed-off-by: Daniel Lezcano <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit f75751d7a1ddf0c3ccc71e0a7117a4be823303d1 Author: Daniel Lezcano <[email protected]> Date: Fri May 9 06:55:12 2014 +0900 ARM: EXYNOS: Move the power sequence call in the cpu_pm notifier The code to initiate and exit the powerdown sequence is the same in pm.c and cpuidle.c. Let's split the common part in the pm.c and reuse it from the cpu_pm notifier. That is one more step forward to make the cpuidle driver arch indenpendant. Signed-off-by: Daniel Lezcano <[email protected]> Reviewed-by: Viresh Kumar <[email protected]> Reviewed-by: Bartlomiej Zolnierkiewicz <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit 7ef8dd93099a531fc579648c17125d623e727262 Author: Daniel Lezcano <[email protected]> Date: Fri May 9 06:53:00 2014 +0900 ARM: EXYNOS: Move the AFTR state function into pm.c In order to remove depedency on pm code, let's move the 'exynos_enter_aftr' function into the pm.c file as well as the other helper functions. Signed-off-by: Daniel Lezcano <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit 9c63359488c69a2ab5e0077baa747a9a03eeb909 Author: Daniel Lezcano <[email protected]> Date: Fri May 9 06:52:59 2014 +0900 ARM: EXYNOS: Encapsulate the AFTR code into a function Let's encapsulate the AFTR state specific call into a single function. Signed-off-by: Daniel Lezcano <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit d9679e49311b7138fa1cbcb20f6c8c3675cc6c1f Author: Daniel Lezcano <[email protected]> Date: Fri May 9 06:52:59 2014 +0900 ARM: EXYNOS: Disable cpuidle for exynos5440 There is no point to register the cpuidle driver for the 5440 as it has only one WFI state which is the default idle function when the cpuidle driver is disabled. By disabling cpuidle we prevent to enter to the governor computation for nothing, thus saving a lot of processing time. The only drawback is the statistic via sysfs on this state which is lost but it is meaningless and it could be retrieved from the ftrace easily. Signed-off-by: Daniel Lezcano <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Acked-by: Amit Kucheria <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit 63f3ab27db4312c903bc268ac1f5a20a0a28119c Author: Daniel Lezcano <[email protected]> Date: Fri May 9 06:52:59 2014 +0900 ARM: EXYNOS: Encapsulate boot vector code into a function for cpuidle Signed-off-by: Daniel Lezcano <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit b00ca44f02e46a638a92608f257dceeefea1d54f Author: Daniel Lezcano <[email protected]> Date: Fri May 9 06:52:59 2014 +0900 ARM: EXYNOS: Pass wakeup mask parameter to function for cpuidle Pass the wakeup mask to 'exynos_set_wakeupmask' as this function could be used for different idle states with different mask. Signed-off-by: Daniel Lezcano <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit ac5369f51081126692fc44ab637ed3c3681ea79a Author: Daniel Lezcano <[email protected]> Date: Fri May 9 06:53:26 2014 +0900 ARM: EXYNOS: Remove ifdef for scu_enable in pm The scu_enable function is already a noop in the scu's header file is CONFIG_SMP=n, so no need to use these macros in the code. Signed-off-by: Daniel Lezcano <[email protected]> Reviewed-by: Viresh Kumar <[email protected]> Reviewed-by: Bartlomiej Zolnierkiewicz <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit efb148f681d8376122ff60d5c36aa3592d4c2c0d Author: Daniel Lezcano <[email protected]> Date: Fri May 9 06:50:16 2014 +0900 ARM: EXYNOS: Move scu_enable in the cpu_pm notifier We make the cpuidle code less arch dependent. Signed-off-by: Daniel Lezcano <[email protected]> Reviewed-by: Viresh Kumar <[email protected]> Reviewed-by: Bartlomiej Zolnierkiewicz <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit 5e5ee768f80860605ec66fe9e4052db82a7166c5 Author: Daniel Lezcano <[email protected]> Date: Fri May 9 06:43:27 2014 +0900 ARM: EXYNOS: Use the cpu_pm notifier for pm Use the cpu_pm_enter/exit notifier to group some pm code inside the pm file. The save and restore code is duplicated across pm.c and cpuidle.c. By using the cpu_pm notifier, we can factor out the routine. Signed-off-by: Daniel Lezcano <[email protected]> Reviewed-by: Viresh Kumar <[email protected]> Reviewed-by: Bartlomiej Zolnierkiewicz <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit 04d2981f15dc93bd52a2c8431afb1456dae7c8fc Author: Daniel Lezcano <[email protected]> Date: Fri May 9 06:43:27 2014 +0900 ARM: EXYNOS: Fix S5P_WAKEUP_STAT call for cpuidle This function should be called only when the powerdown sequence fails. Even if the current code does not hurt, by moving this line, we have the same code than the one in pm.c. Signed-off-by: Daniel Lezcano <[email protected]> Reviewed-by: Viresh Kumar <[email protected]> Reviewed-by: Bartlomiej Zolnierkiewicz <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit ff15bf49dcce85acd4220512dc30523a12e3bb81 Author: Daniel Lezcano <[email protected]> Date: Fri May 9 06:43:27 2014 +0900 ARM: EXYNOS: Move some code inside the idle_finisher for cpuidle Move the code around to differentiate different section of code and prepare it to be factored out in the next patches. The call order changed but hat doesn't have a side effect because they are independent. The important call is cpu_do_idle() which must be done the last. Signed-off-by: Daniel Lezcano <[email protected]> Reviewed-by: Viresh Kumar <[email protected]> Reviewed-by: Bartlomiej Zolnierkiewicz <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit e102ca61840e80ef6e347e81b17b2eff088290e9 Author: Daniel Lezcano <[email protected]> Date: Fri May 9 06:43:27 2014 +0900 ARM: EXYNOS: Encapsulate register access inside a function for pm That makes the code cleaner and encapsulted. The function will be reused in the next patch. Signed-off-by: Daniel Lezcano <[email protected]> Reviewed-by: Viresh Kumar <[email protected]> Reviewed-by: Bartlomiej Zolnierkiewicz <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit 905e625e9411841cfc1ede8886f8df6153babd19 Author: Daniel Lezcano <[email protected]> Date: Fri May 9 06:43:26 2014 +0900 ARM: EXYNOS: Change function name prefix for cpuidle The driver was initially written for exynos4 but the driver is used also for exynos5. Change the function prefix name exynos4 -> exynos Signed-off-by: Daniel Lezcano <[email protected]> Reviewed-by: Viresh Kumar <[email protected]> Reviewed-by: Bartlomiej Zolnierkiewicz <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit c60cdc63176588a0e715e4da3984a3ea0efc5858 Author: Daniel Lezcano <[email protected]> Date: Fri May 9 06:43:26 2014 +0900 ARM: EXYNOS: Use cpuidle_register Use the cpuidle generic function 'cpuidle_register'. That saves us from some extra lines of code and unneeded variables. A side effect of this change is a bug fix where before the cpuidle driver was registered for each_online_cpu and now it is for each_possible_cpu. Signed-off-by: Daniel Lezcano <[email protected]> Reviewed-by: Viresh Kumar <[email protected]> Reviewed-by: Bartlomiej Zolnierkiewicz <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit 59b52960dac2e4d35959a459f5ef2895927e95c1 Author: Daniel Lezcano <[email protected]> Date: Fri May 9 06:43:26 2014 +0900 ARM: EXYNOS: Prevent forward declaration for cpuidle Move the structure below the 'exynos4_enter_lowpower' function so no more need of forward declaration. Signed-off-by: Daniel Lezcano <[email protected]> Reviewed-by: Viresh Kumar <[email protected]> Reviewed-by: Bartlomiej Zolnierkiewicz <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit cfbad697765dea7eb0478ae4234dd3a35cbb8f16 Author: Amit Daniel Kachhap <[email protected]> Date: Fri May 9 06:43:26 2014 +0900 ARM: EXYNOS: Move arm core power down clock to exynos5250 common clock Now with common clock support added for exynos5250 it is necessary to move this code to exynos5250 common clock driver as clock registers should be handled there. This change is tested in exynos5250 based arndale platform. Cc: Abhilash Kesavan <[email protected]> Cc: Thomas Abraham <[email protected]> Acked-by: Kukjin Kim <[email protected]> Reviewed-by: Bartlomiej Zolnierkiewicz <[email protected]> Signed-off-by: Amit Daniel Kachhap <[email protected]> [t.figa: Rebased onto current kernel sources.] Signed-off-by: Tomasz Figa <[email protected]> Signed-off-by: Daniel Lezcano <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit 9c88669c2cfc91158f157b5584103ff7e5b6bedb Author: Axel Lin <[email protected]> Date: Wed Apr 9 17:21:26 2014 +0800 pwm: twl: Really disable twl6030 PWMs Current twl6030_pwm_disable() implementation writes TWL6030_TOGGLE3_REG twice, the second write sets TWL6030_PWMXEN bits so the PWM clock does not disable. Signed-off-by: Axel Lin <[email protected]> Acked-by: Peter Ujfalusi <[email protected]> Signed-off-by: Thierry Reding <[email protected]> commit 29a61d83ad2da88bbbadb554b72fdd2c3bb36c63 Author: Ivan Khoronzhuk <[email protected]> Date: Thu May 8 17:31:01 2014 -0400 ARM: dts: k2l-evm: add AEMIF/NAND device entry Add AEMIF/NAND device entry. Signed-off-by: Ivan Khoronzhuk <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]> commit 81141a027c5d0c49373e4af7d068b0ca5ad6442a Author: Rahul Sharma <[email protected]> Date: Fri May 9 06:26:44 2014 +0900 ARM: dts: add dts files for exynos5260-xyref5260 board The patch adds the dts files for xyref5260 board which is based on exynos5260 SoC. Signed-off-by: Rahul Sharma <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit af6cf11c31763c49c8f0a64e4be23fab58bb019e Author: Rahul Sharma <[email protected]> Date: Fri May 9 06:26:41 2014 +0900 ARM: dts: add dts files for exynos5260 SoC The patch adds the dts files for exynos5260. Signed-off-by: Pankaj Dubey <[email protected]> Signed-off-by: Rahul Sharma <[email protected]> Signed-off-by: Arun Kumar K <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Reviewed-by: Sachin Kamat <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit 95711059c5286b320ca08ebc33966994ac26d5aa Author: Jens Axboe <[email protected]> Date: Thu May 8 15:26:30 2014 -0600 blk-mq: cleanup some leftover code from the double tagging scheme Don't need ->use_bitmap_tags anymore, and we need not print what kind of tagging type we selected. Signed-off-by: Jens Axboe <[email protected]> commit 8b144ffd7b6c8edbdc881b0a32858e1447fa441f Author: Ivan Khoronzhuk <[email protected]> Date: Thu May 8 17:19:08 2014 -0400 ARM: dts: k2e-evm: add AEMIF/NAND device entry Add AEMIF/NAND device entry. Signed-off-by: Ivan Khoronzhuk <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]> commit 4bfb5edef0cc4387d0760f5eb2d0dcfabc237b95 Author: Kyungmin Park <[email protected]> Date: Fri May 9 06:19:18 2014 +0900 ARM: EXYNOS: Support secondary CPU boot of exynos4212 This patch fix the offset of CPU boot address and change parameter of smc call of SMC_CMD_CPU1BOOT command for Exynos4212. Signed-off-by: Kyungmin Park <[email protected]> Signed-off-by: Chanwoo Choi <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit b10fd728b985ae2d18ce9bf4c2161a6eb002683c Author: Jens Axboe <[email protected]> Date: Thu May 8 15:12:07 2014 -0600 mtip32xx: convert to use blk-mq This rips out timeout handling, requeueing, etc in converting it to use blk-mq instead. Signed-off-by: Jens Axboe <[email protected]> commit 437ec65fa3c937b5f8b9c0573f60a327320937e3 Author: Jens Axboe <[email protected]> Date: Thu May 8 15:05:12 2014 -0600 blk-mq: implement new and more efficient tagging scheme blk-mq currently uses percpu_ida for tag allocation. But that only works well if the ratio between tag space and number of CPUs is sufficiently high. For most devices and systems, that is not the case. The end result if that we either only utilize the tag space partially, or we end up attempting to fully exhaust it and run into lots of lock contention with stealing between CPUs. This is not optimal. This new tagging scheme is a hybrid bitmap allocator. It uses two tricks to both be SMP friendly and allow full exhaustion of the space: 1) We cache the last allocated (or freed) tag on a per blk-mq software context basis. This allows us to limit the space we have to search. The key element here is not caching it in the shared tag structure, otherwise we end up dirtying more shared cache lines on each allocate/free operation. 2) The tag space is split into cache line sized groups, and each context will start off randomly in that space. Even up to full utilization of the space, this divides the tag users efficiently into cache line groups, avoiding dirtying the same one both between allocators and between allocator and freeer. This scheme shows drastically better behaviour, both on small tag spaces but on large ones as well. It has been tested extensively to show better performance for all the cases blk-mq cares about. Signed-off-by: Jens Axboe <[email protected]> commit 78bb0b8c61ab00fb1c61653464ab6c26e8b47558 Author: Jens Axboe <[email protected]> Date: Thu May 8 15:03:42 2014 -0600 wait: make prepare_to_wait() return if it added task to wait queue The caller can make some decisions based on whether or not the task was already on the waitqueue. blk-mq will use this for batched wakeups on tag frees. Signed-off-by: Jens Axboe <[email protected]> commit 3528dd34b2d3dc642669fd12399e18a16e3aacc8 Author: Arun Kumar K <[email protected]> Date: Fri May 9 06:06:25 2014 +0900 ARM: dts: Add exynos5420 peach-pit board support Adds the google peach-pit board dts file which uses exynos5420 SoC. Signed-off-by: Arun Kumar K <[email protected]> Signed-off-by: Doug Anderson <[email protected]> Reviewed-by: Doug Anderson <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit 8e371a91d98e8d8d032c6032eb0ac6e2bbcb231f Author: Arun Kumar K <[email protected]> Date: Fri May 9 06:06:24 2014 +0900 ARM: dts: Add node labels to exynos5420 Adding labels to nodes which do not have it yet in exynos5420. This is done so as to use reference based node updation in board files. Signed-off-by: Arun Kumar K <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Reviewed-by: Doug Anderson <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit c4539e88e758901c298ee1f6c0e19471be693f54 Author: Arun Kumar K <[email protected]> Date: Fri May 9 06:06:10 2014 +0900 ARM: dts: Add pwmX_out pinctrl nodes to exynos5420 Adds the PWM nodes to 5420 pinctrl dtsi file. Signed-off-by: Arun Kumar K <[email protected]> Reviewed-by: Doug Anderson <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit 4cb378646ef85e76745225912025871f3dc93ca3 Author: Sylwester Nawrocki <[email protected]> Date: Fri May 9 06:01:40 2014 +0900 ARM: dts: Add rear camera nodes for exynos4412-trats2 This patch enables the rear facing camera (s5c73m3) on TRATS2 board by adding the I2C0 bus controller, s5c73m3 sensor, MIPI CSI-2 receiver and the sensor's voltage regulator supply nodes. Signed-off-by: Andrzej Hajda <[email protected]> Acked-by: Kyungmin Park <[email protected]> Signed-off-by: Sylwester Nawrocki <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit ee5eda64af051097c00534db7c5432c4a061d355 Author: Sylwester Nawrocki <[email protected]> Date: Fri May 9 06:00:35 2014 +0900 ARM: dts: Update camera nodes for exynos4 and exynos4412-trats2 Remove unused /camera/clock-controller node and add required clock properties to the camera node. This is required for a clock provider that will be referenced by image sensor devices. Also add required clock related changes to s5k6a3 device node and afvdd regulator supply. Signed-off-by: Sylwester Nawrocki <[email protected]> Acked-by: Kyungmin Park <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit 6af2ba90818f9e9c4b8711e1f896e797c5da151c Author: Tomasz Stanislawski <[email protected]> Date: Fri May 9 05:58:59 2014 +0900 ARM: dts: rename alias for i2c_ak8975 label for exynos4412-trats2 The i2c_ak8975 controller uses label i2c8. This alias is already used for I2C controller 8 defined in file arch/arm/boot/dts/exynos4.dtsi. This patch renames a label for i2c_ak8975 to i2c9. Signed-off-by: Tomasz Stanislawski <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit 9c869d1f07852b47ae8578c14161ec2821682464 Author: Tomasz Stanislawski <[email protected]> Date: Fri May 9 05:55:42 2014 +0900 ARM: dts: add missing pinctrls for I2C of exynos4 This patch adds missing pinctrls for I2C controllers 2-7. Signed-off-by: Tomasz Stanislawski <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit c92ecf94d3156f79825a994e509aa070ceebae88 Author: Christoph Hellwig <[email protected]> Date: Tue May 6 12:12:45 2014 +0200 blk-mq: initialize struct request fields individually This allows us to avoid a non-atomic memset over ->atomic_flags as well as killing lots of duplicate initializations. Signed-off-by: Christoph Hellwig <[email protected]> Signed-off-by: Jens Axboe <[email protected]> commit face4c34519c38eda4020ab9964e5b55fcfbaa4a Author: Heiko Stuebner <[email protected]> Date: Fri May 9 05:51:43 2014 +0900 ARM: S3C24XX: remove SAMSUNG_CLOCK remnants after ccf conversion This finally removes all remaining SAMSUNG_CLOCK conditional code from s3c24xx architectures. Signed-off-by: Heiko Stuebner <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit 8fb211f9c6c32e938ebbc03e6de6300156f911d7 Author: Jens Axboe <[email protected]> Date: Thu May 8 14:50:19 2014 -0600 blk-mq: update a hotplug comment for grammar Signed-off-by: Jens Axboe <[email protected]> commit 597000cf07742cd218d1c16bc7600fa2a6a884cd Author: Heiko Stuebner <[email protected]> Date: Fri May 9 05:49:36 2014 +0900 ARM: S3C24XX: remove legacy clock code With the move to the common clock framework completed for s3c2410, s3c2440 and s3c2442, the legacy clock code for these machines can go away too. This also includes the legacy dclk code, as all legacy users are converted. Signed-off-by: Heiko Stuebner <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit 355c9f77a6d9f41f390bb776b7e561458afbcf39 Author: Heiko Stuebner <[email protected]> Date: Fri May 9 05:49:29 2014 +0900 ARM: S3C24XX: convert s3c2410 to common clock framework Convert the machines using the s3c2410 to use the new driver based on the common clock framework instead of the legacy Samsung clock driver. As with the s3c244x, machines using the clkout output will need a fixup from someone with the hardware. Signed-off-by: Heiko Stuebner <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit abe9f29b0471d1e7ff1ef4ae94bcc6b1525e15f9 Author: Heiko Stuebner <[email protected]> Date: Fri May 9 05:49:19 2014 +0900 ARM: S3C24XX: convert s3c2440 and s3c2442 to common clock framework Convert all machines using these cpus to use the ccf clock driver instead of the legacy Samsung clock implementation. Some of the more esotheric machines will probably need a fixup, as they do strange things to the clkout outputs, that I did not really understand nor have the hardware to check. Signed-off-by: Heiko Stuebner <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit 1a54e4342c42e01f0117c05d8bb2c9309cc435e8 Author: Heiko Stuebner <[email protected]> Date: Fri May 9 05:49:14 2014 +0900 ARM: S3C24XX: add platform code for conversion to the common clock framework This adds the necessary init functions to init the clocks from the common clock framework and necessary CONFIG_SAMSUNG_CLOCK ifdefs around the legacy clock code. This also includes empty stubs for the *_setup_clocks functions that are called from the cpufreq driver on resume. Signed-off-by: Heiko Stuebner <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit 6dc8f9c7783546483d0b86e18e78896c2d31ae86 Author: Heiko Stuebner <[email protected]> Date: Fri May 9 05:49:10 2014 +0900 clk: samsung: add clock controller driver for s3c2410, s3c2440 and s3c2442 This driver can handle the clock controllers of the socs mentioned above, as they share a common clock tree with only small differences. The clock structure is built according to the manuals of the included SoCs and might include changes in comparison to the previous clock structure. As pll-rate-tables only the 12mhz variants are currently included. The original code was wrongly checking for 169mhz xti values [a 0 to much at the end], so the original 16mhz pll table would have never been included and its values are so obscure that I have no possibility to at least check their sane-ness. When using the formula from the manual the resulting frequency is near the table value but still slightly off. Signed-off-by: Heiko Stuebner <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit 639335c0f488b948c8946f2ba421113544905587 Author: Heiko Stuebner <[email protected]> Date: Fri May 9 05:49:05 2014 +0900 dt-bindings: add documentation for s3c2410 clock controller Describe the clock controller of s3c2410, s3c2440 and s3c2442. Signed-off-by: Heiko Stuebner <[email protected]> Acked-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit 4d4cfe75853f61219b08244748d1d4f9634726db Author: Heiko Stuebner <[email protected]> Date: Fri May 9 05:48:57 2014 +0900 ARM: S3C24XX: enable usage of common dclk if common clock framework is enabled Add platform device and select the correct implementation automatically depending on wether the old samsung_clock or the common clock framework is enabled. This is only done for machines already using the old dclk implementation, as everybody else should move to use dt anyway. The machine-specific settings for the external clocks will have to be set by somebody with knowledge about the specific hardware. Signed-off-by: Heiko Stuebner <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit 5799ea12a41286d9588155a1abd828f43bc63d6b Author: Heiko Stuebner <[email protected]> Date: Fri May 9 05:48:51 2014 +0900 clk: samsung: add clock driver for external clock outputs This adds a driver for controlling the external clock outputs of s3c24xx architectures including the dclk muxes and dividers. The driver at the moment only supports the legacy non-dt boards using these clock outputs. The clock-output control itself is part of the system-controller mainly controlled by the pinctrl drivers. So it should most likely be integrated there for dt platforms. Signed-off-by: Heiko Stuebner <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit d8b532578f39fdec159105bc415938910351a699 Author: Heiko Stuebner <[email protected]> Date: Fri May 9 05:48:44 2014 +0900 ARM: S3C24XX: cpufreq-utils: don't write raw values to MPLLCON when using ccf The s3c24xx cpufreq driver needs to change the mpll speed and was doing this by writing raw values from a translation table into the MPLLCON register. Change this to use a regular clk_set_rate call when using the common clock framework and only write the raw value in the samsung_clock case. The s3c cpufreq driver does already aquire the mpll, so simply add a reference to struct s3c_cpufreq_config to let set_fvco access it. While struct clk is opaque the differenciation between samsung clock and common clock is kept, as the samsung-clock mpll clk does not implement a real set_rate. Signed-off-by: Heiko Stuebner <[email protected]> Acked-by: Tomasz Figa <[email protected]> Signed-off-by: Kukjin Kim <[email protected]> commit 1eaade629f5c479f5f043c8c24e5daa7029b5e2e Author: Jens Axboe <[email protected]> Date: Thu May 8 14:46:27 2014 -0600 blk-mq: track software context online status seperately By separating it from the system notion of a specific CPU being online or not, we get away from problems with ordering of the CPU hotplug notifiers. Signed-off-by: Jens Axboe <[email protected]> commit 14f3791439b5a6cf12127fb80204265533d92664 Author: Santosh Shilimkar <[email protected]> Date: Mon Feb 24 17:32:59 2014 +0200 ARM: keystone: Update the dma offset for non-dt platform devices Tested-by: Grygorii Strashko <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]> commit 5eb3da7246a5b2dfac9f38a7be62b1a0295584c7 Author: Santosh Shilimkar <[email protected]> Date: Thu Jun 13 19:24:39 2013 -0400 ARM: keystone: Switch over to coherent memory address space With late code patching updates for LPAE machines has merged now and memblock conversion from bootmem is on its way, Keystone can switch to the coherent memory address space which starts beyond 4GB boundary. The idmap alias needs are managed via virt_to_idmap() for boot purpose. Tested-by: Grygorii Strashko <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]> commit 27379350a9cb6f39e136325d33b9cc9357da263e Author: Brian Norris <[email protected]> Date: Thu May 8 15:34:28 2014 -0400 ARM: configs: keystone: add MTD_SPI_NOR (new dependency for M25P80) This defconfig contains the CONFIG_M25P80 symbol, which is now dependent on the MTD_SPI_NOR symbol. Add CONFIG_MTD_SPI_NOR to satisfy the new dependency. Signed-off-by: Brian Norris <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]> commit efdd1946c44e0d5fdf36e03176705260145d122b Author: Lad Prabhakar <[email protected]> Date: Thu May 8 15:32:46 2014 -0400 ARM: configs: keystone: drop CONFIG_COMMON_CLK_DEBUG this patch removes COMMON_CLK_DEBUG config option from defconfig file as this config option is obsolete. Signed-off-by: Lad, Prabhakar <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]> commit 86156978a398dfc92294653c49c9374aaa6e5316 Author: Santosh Shilimkar <[email protected]> Date: Mon Feb 24 16:42:19 2014 -0500 ARM: dts: keystone: Update USB node for dma properties Keystone supports dma-coherent on USB master and also needs dma-ranges to specify the hardware alias memory range in which DMA can be operational. Cc: Russell King <[email protected]> Cc: Arnd Bergmann <[email protected]> Cc: Olof Johansson <[email protected]> Cc: Grant Likely <[email protected]> Cc: Rob Herring <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]> commit 4d46596d789d86441eeb1f02bb6d9ea10215fa5d Author: Grygorii Strashko <[email protected]> Date: Wed Feb 12 19:20:16 2014 +0200 ARM: dts: keystone: Use dma-ranges property The dma-ranges property has to be specified per bus and has format: < DMA addr > - Base DMA address for Bus (Bus format 32-bits) < CPU addr > - Corresponding base CPU address (CPU format 64-bits) < DMA range size > - Size of supported DMA range Cc: Russell King <[email protected]> Cc: Arnd Bergmann <[email protected]> Cc: Olof Johansson <[email protected]> Cc: Grant Likely <[email protected]> Cc: Rob Herring <[email protected]> Signed-off-by: Grygorii Strashko <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]> commit 509046a7b00cf540e49d3072b1efe7cb0b1bdc20 Author: Grygorii Strashko <[email protected]> Date: Mon Apr 28 15:20:22 2014 +0300 ARM: dts: keystone: add cell's information to spi nodes SPI nodes should always have #address-cells and #size-cells defined, otherwise warnings will be produced in case of adding any child nodes to the SPI bus in DT: Warning (avoid_default_addr_size): Relying on default #address-cells value for /soc/spi@21000400/n25q128a11@0 Warning (avoid_default_addr_size): Relying on default #size-cells value for /soc/spi@21000400/n25q128a11@0 Hence, ensure that all SPIx nodes have #address-cells and #size-cells properties defined. Signed-off-by: Grygorii Strashko <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]> commit e42d8a7f966b7b3b817adece0573d07754a647d2 Author: Grygorii Strashko <[email protected]> Date: Tue Apr 8 14:46:07 2014 +0300 ARM: dts: keystone: move i2c0 device node from SoC to board files I2C devices are not the part of Keystone SoC and have to be defined in board DTS files. Hence, move i2c0 EEPROM device node from Keystone SoC to k2hk, k2e, k2l EVM files as they all have similar EEPROM SoCs installed. Signed-off-by: Grygorii Strashko <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]> commit 3953505afbb80bfcf0e9dc2ba7199e63b0fef69f Author: Grygorii Strashko <[email protected]> Date: Tue Apr 8 14:46:06 2014 +0300 ARM: dts: keystone: add cell's information to i2c nodes I2C nodes should always have #address-cells and #size-cells defined, otherwise warnings will be produced in case of adding child nodes to the I2C bus in DT: Warning (avoid_default_addr_size): Relying on default #address-cells value for /soc/i2c@2530800/pca@20 Warning (avoid_default_addr_size): Relying on default #size-cells value for /soc/i2c@2530800/pca@20 Hence, ensure that all i2cX nodes have #address-cells and #size-cells properties defined. Signed-off-by: Grygorii Strashko <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]> commit 5e014d0c020d37af897a0867bc1840f098bf3cee Author: Lucas Stach <[email protected]> Date: Mon Apr 14 16:18:13 2014 +0200 ARM: dts: keystone: drop address and size cells from GIC node This is likely a copy-and-paste error from the ARM GIC documentation, that has already been fixed. address-cells should have been set to 0, as with the size cells. As having those properties set to 0 is the same thing as not specifying them, drop them completely. Signed-off-by: Lucas Stach <[email protected]> Acked-by: Rob Herring <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]> commit 9fa1959e976f7a6ae84f616ca669359028070c61 Author: Kinglong Mee <[email protected]> Date: Tue Apr 8 13:06:28 2014 +0800 NFSD: Get rid of empty function nfs4_state_init Signed-off-by: Kinglong Mee <[email protected]> Signed-off-by: J. Bruce Fields <[email protected]> commit f3e41ec5ef0f5d2e10b6bfd3a13dc29f6d260d79 Author: Kinglong Mee <[email protected]> Date: Tue Apr 8 13:04:01 2014 +0800 NFSD: Use simple_read_from_buffer for coping data to userspace Signed-off-by: Kinglong Mee <[email protected]> Signed-off-by: J. Bruce Fields <[email protected]> commit ecca063b31b88d31ee79e9d958ea78023659554e Author: Kinglong Mee <[email protected]> Date: Tue Apr 15 17:13:56 2014 +0800 SUNRPC: Fix printk that is not only for nfsd Signed-off-by: Kinglong Mee <[email protected]> Signed-off-by: J. Bruce Fields <[email protected]> commit c5c0903b2cda930c76d296419d290137294779f2 Author: Borislav Petkov <[email protected]> Date: Thu May 8 20:37:07 2014 +0200 EDAC, MCE, AMD: Remove leftover unused mask 295d8cda2689 ("EDAC, MCE, AMD: Drop local coreid reporting") removed the code snippet which used that mask but forgot to drop the mask itself. Do that now. Signed-off-by: Borislav Petkov <[email protected]> commit 0cac6fc3eb5218fe40d1c2910abc643ab21d9f19 Author: Vinod Koul <[email protected]> Date: Mon May 5 14:27:52 2014 +0530 ASoC: Intel: rename pcm dias to media dai this is for further updates to driver which supports DPCM :) Signed-off-by: Vinod Koul <[email protected]> Signed-off-by: Mark Brown <[email protected]> commit 6f46c0d33e76db2c820c47e9af61e0e3dba10a68 Author: Vinod Koul <[email protected]> Date: Mon May 5 14:27:51 2014 +0530 ASoC: Intel: remove unused sst-mfld platform dais With DPCM we have media dai used and no seperate headset and speaker dai so remove the speaker dai The vibra is no longer supported thru audio, so remove Signed-off-by: Vinod Koul <[email protected]> Signed-off-by: Mark Brown <[email protected]> commit 4b68b4e1c564f32e4eb18186749b29c9a78772f4 Author: Vinod Koul <[email protected]> Date: Mon May 5 14:27:50 2014 +0530 ASoC: Intel: split the pcm and compress to different files For manging them and adding support for more platforms Code move only Signed-off-by: Vinod Koul <[email protected]> Signed-off-by: Mark Brown <[email protected]> commit 4496ffab7dade2206f3d5dea86b9928a5f173de2 Author: Vinod Koul <[email protected]> Date: Mon May 5 14:27:49 2014 +0530 ASoC: Intel: mark sst_set_stream_status as non static as this will be used in compressed split file in subsequent patch Signed-off-by: Vinod Koul <[email protected]> Signed-off-by: Mark Brown <[email protected]> commit e11fd7c3ac49e2294f9562b6329ca50923e56fa7 Author: Vinod Koul <[email protected]> Date: Mon May 5 14:27:48 2014 +0530 ASoc: Intel: rename sst-mfld-platform.c to sst-mfld-platform-pcm.c so that we can split pcm and compress to different files for upcoming changes to support more platforms Signed-off-by: Vinod Koul <[email protected]> Signed-off-by: Mark Brown <[email protected]> commit 300f53bf199f660bea3ed7afe9fd938064f19c15 Author: Vinod Koul <[email protected]> Date: Mon May 5 14:27:47 2014 +0530 ASoC: Intel: remove FSF snail mail address As this address can move Signed-off-by: Vinod Koul <[email protected]> Signed-off-by: Mark Brown <[email protected]> commit 2b4c78df056a7231635cf629380486a074daf56b Author: Vinod Koul <[email protected]> Date: Mon May 5 22:19:25 2014 +0530 ASoC: Intel: move component registration blob to the place near it is used Signed-off-by: Vinod Koul <[email protected]> Signed-off-by: Mark Brown <[email protected]> commit 555f8a80c397b1a6ffccb294525df6ca2d721585 Author: Liam Girdwood <[email protected]> Date: Mon May 5 17:31:37 2014 +0100 ASoC: Intel: Add support to unload/reload firmware modules. Add some SST API calls to unload and reload firmware modules. This can be used by PM code to restore state and also allow modular FW to unload and release memory blocks. Signed-off-by: Liam Girdwood <[email protected]> Signed-off-by: Mark Brown <[email protected]> commit 6f1c9c57b4e0783acca9c0fe53850f24d30785a3 Author: Charles Keepax <[email protected]> Date: Thu May 8 17:17:38 2014 +0100 regulator: arizona-micsupp: Add missing #include of.h is presently being included through asm-generic/gpio.h so will not be included on some architectures, causing implicit declaration errors for of_get_child_by_name, of_parse_phandle and of_node_put. This patch adds the direct include that should be there. Reported-by: Arnd Bergmann <[email protected]> Signed-off-by: Charles Keepax <[email protected]> Signed-off-by: Mark Brown <[email protected]> commit 9f0affcf3e21fc56d8bce625bb3d5800b7a7d284 Author: Vincent Stehlé <[email protected]> Date: Tue May 6 22:23:02 2014 +0200 ARM: mvebu: Fix pmsu compilation when ARMv6 is selected When compiling for multiplatform for both ARMv6 and ARMv7, the default compiler flags are for ARMv6, and we will get: /tmp/ccwDEzd0.s: Assembler messages: /tmp/ccwDEzd0.s:639: Error: selected processor does not support ARM mode `isb ' /tmp/ccwDEzd0.s:645: Error: selected processor does not support ARM mode `isb ' /tmp/ccwDEzd0.s:646: Error: selected processor does not support ARM mode `dsb ' /tmp/ccwDEzd0.s:695: Error: selected processor does not support ARM mode `isb ' make[1]: *** [arch/arm/mach-mvebu/pmsu.o] Error 1 Fix this in a similar manner than done previously in commit 72533b77d30c2be02672e26b5dde1263d7b4c2be, by specifying ARMv7 flags for pmsu.o. Signed-off-by: Vincent Stehlé <[email protected]> Link: https://lkml.kernel.org/r/[email protected] Cc: Jason Cooper <[email protected]> Cc: Andrew Lunn <[email protected]> Cc: Gregory Clement <[email protected]> Cc: Sebastian Hesselbarth <[email protected]> Cc: Russell King <[email protected]> Signed-off-by: Jason Cooper <[email protected]> commit 5409e46f1bcf960c651f3fff35f2f25e539655cf Author: Christoph Hellwig <[email protected]> Date: Wed May 7 13:49:44 2014 +0200 nfsd: clean up fh_auth usage Use fh_fsid when reffering to the fsid part of the filehandle. The variable length auth field envisioned in nfsfh wasn't ever implemented. Also clean up some lose ends around this and document the file handle format better. Btw, why do we even export nfsfh.h to userspace? The file handle very much is kernel private, and nothing in nfs-utils include the header either. Signed-off-by: Christoph Hellwig <[email protected]> Signed-off-by: J. Bruce Fields <[email protected]> commit ecc7455d8eb1860f5aa6b9ad82a9a81f93eb11d1 Author: Kinglong Mee <[email protected]> Date: Wed May 7 23:08:04 2014 +0800 NFSD: cleanup unneeded including linux/export.h commit 4ac7249ea5a0ceef9f8269f63f33cc873c3fac61 have remove all EXPORT_SYMBOL, linux/export.h is not needed, just clean it. Signed-off-by: Kinglong Mee <[email protected]> Signed-off-by: J. Bruce Fields <[email protected]> commit aa07c713ecfc0522916f3cd57ac628ea6127c0ec Author: Kinglong Mee <[email protected]> Date: Fri Apr 18 20:49:04 2014 +0800 NFSD: Call ->set_acl with a NULL ACL structure if no entries After setting ACL for directory, I got two problems that caused by the cached zero-length default posix acl. This patch make sure nfsd4_set_nfs4_acl calls ->set_acl with a NULL ACL structure if there are no entries. Thanks for Christoph Hellwig's advice. First problem: ............ hang ........... Second problem: [ 1610.167668] ------------[ cut here ]------------ [ 1610.168320] kernel BUG at /root/nfs/linux/fs/nfsd/nfs4acl.c:239! [ 1610.168320] invalid opcode: 0000 [#1] SMP DEBUG_PAGEALLOC [ 1610.168320] Modules linked in: nfsv4(OE) nfs(OE) nfsd(OE) rpcsec_gss_krb5 fscache ip6t_rpfilter ip6t_REJECT cfg80211 xt_conntrack rfkill ebtable_nat ebtable_broute bridge stp llc ebtable_filter ebtables ip6table_nat nf_conntrack_ipv6 nf_defrag_ipv6 nf_nat_ipv6 ip6table_mangle ip6table_security ip6table_raw ip6table_filter ip6_tables iptable_nat nf_conntrack_ipv4 nf_defrag_ipv4 nf_nat_ipv4 nf_nat nf_conntrack iptable_mangle iptable_security iptable_raw auth_rpcgss nfs_acl snd_intel8x0 ppdev lockd snd_ac97_codec ac97_bus snd_pcm snd_timer e1000 pcspkr parport_pc snd parport serio_raw joydev i2c_piix4 sunrpc(OE) microcode soundcore i2c_core ata_generic pata_acpi [last unloaded: nfsd] [ 1610.168320] CPU: 0 PID: 27397 Comm: nfsd Tainted: G OE 3.15.0-rc1+ #15 [ 1610.168320] Hardware name: innotek GmbH VirtualBox/VirtualBox, BIOS VirtualBox 12/01/2006 [ 1610.168320] task: ffff88005ab653d0 ti: ffff88005a944000 task.ti: ffff88005a944000 [ 1610.168320] RIP: 0010:[<ffffffffa034d5ed>] [<ffffffffa034d5ed>] _posix_to_nfsv4_one+0x3cd/0x3d0 [nfsd] [ 1610.168320] RSP: 0018:ffff88005a945b00 EFLAGS: 00010293 [ 1610.168320] RAX: 0000000000000001 RBX: ffff88006700bac0 RCX: 0000000000000000 [ 1610.168320] RDX: 0000000000000000 RSI: ffff880067c83f00 RDI: ffff880068233300 [ 1610.168320] RBP: ffff88005a945b48 R08: ffffffff81c64830 R09: 0000000000000000 [ 1610.168320] R10: ffff88004ea85be0 R11: 000000000000f475 R12: ffff880068233300 [ 1610.168320] R13: 0000000000000003 R14: 0000000000000002 R15: ffff880068233300 [ 1610.168320] FS: 0000000000000000(0000) GS:ffff880077800000(0000) knlGS:0000000000000000 [ 1610.168320] CS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b [ 1610.168320] CR2: 00007f5bcbd3b0b9 CR3: 0000000001c0f000 CR4: 00000000000006f0 [ 1610.168320] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 [ 1610.168320] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 [ 1610.168320] Stack: [ 1610.168320] ffffffff00000000 0000000b67c83500 000000076700bac0 0000000000000000 [ 1610.168320] ffff88006700bac0 ffff880068233300 ffff88005a945c08 0000000000000002 [ 1610.168320] 0000000000000000 ffff88005a945b88 ffffffffa034e2d5 000000065a945b68 [ 1610.168320] Call Trace: [ 1610.168320] [<ffffffffa034e2d5>] nfsd4_get_nfs4_acl+0x95/0x150 [nfsd] [ 1610.168320] [<ffffffffa03400d6>] nfsd4_encode_fattr+0x646/0x1e70 [nfsd] [ 1610.168320] [<ffffffff816a6e6e>] ? kmemleak_alloc+0x4e/0xb0 [ 1610.168320] [<ffffffffa0327962>] ? nfsd_setuser_and_check_port+0x52/0x80 [nfsd] [ 1610.168320] [<ffffffff812cd4bb>] ? selinux_cred_prepare+0x1b/0x30 [ 1610.168320] [<ffffffffa0341caa>] nfsd4_encode_getattr+0x5a/0x60 [nfsd] [ 1610.168320] [<ffffffffa0341e07>] nfsd4_encode_operation+0x67/0x110 [nfsd] [ 1610.168320] [<ffffffffa033844d>] nfsd4_proc_compound+0x21d/0x810 [nfsd] [ 1610.168320] [<ffffffffa0324d9b>] nfsd_dispatch+0xbb/0x200 [nfsd] [ 1610.168320] [<ffffffffa00850cd>] svc_process_common+0x46d/0x6d0 [sunrpc] [ 1610.168320] [<ffffffffa0085433>] svc_process+0x103/0x170 [sunrpc] [ 1610.168320] [<ffffffffa032472f>] nfsd+0xbf/0x130 [nfsd] [ 1610.168320] [<ffffffffa0324670>] ? nfsd_destroy+0x80/0x80 [nfsd] [ 1610.168320] [<ffffffff810a5202>] kthread+0xd2/0xf0 [ 1610.168320] [<ffffffff810a5130>] ? insert_kthread_work+0x40/0x40 [ 1610.168320] [<ffffffff816c1ebc>] ret_from_fork+0x7c/0xb0 [ 1610.168320] [<ffffffff810a5130>] ? insert_kthread_work+0x40/0x40 [ 1610.168320] Code: 78 02 e9 e7 fc ff ff 31 c0 31 d2 31 c9 66 89 45 ce 41 8b 04 24 66 89 55 d0 66 89 4d d2 48 8d 04 80 49 8d 5c 84 04 e9 37 fd ff ff <0f> 0b 90 0f 1f 44 00 00 55 8b 56 08 c7 07 00 00 00 00 8b 46 0c [ 1610.168320] RIP [<ffffffffa034d5ed>] _posix_to_nfsv4_one+0x3cd/0x3d0 [nfsd] [ 1610.168320] RSP <ffff88005a945b00> [ 1610.257313] ---[ end trace 838254e3e352285b ]--- Signed-off-by: Kinglong Mee <[email protected]> Cc: [email protected] Signed-off-by: J. Bruce Fields <[email protected]> commit 39438567179536c9f32e85d19586a11aebe1f860 Author: Thomas Petazzoni <[email protected]> Date: Mon May 5 17:05:26 2014 +0200 ARM: mvebu: conditionalize Armada 375 coherency workaround The Armada 375 coherency workaround only needs to be applied to the Z1 revision of the SoC. The A0 and later revisions have been fixed, and no longer need this workaround. Signed-off-by: Thomas Petazzoni <[email protected]> Link: https://lkml.kernel.org/r/1399302326-6917-6-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <[email protected]> commit a58d5af7d992a5e6dd8e55b3e618bd77f0368b57 Author: Thomas Petazzoni <[email protected]> Date: Mon May 5 17:05:25 2014 +0200 ARM: mvebu: conditionalize Armada 375 SMP workaround The Armada 375 SMP workaround only needs to be applied to the Z1 revision of the SoC. The A0 and later revisions have been fixed, and no longer need this workaround. Note that the initialization of the SMP workaround is delayed from ->smp_prepare_cpus() to ->smp_boot_secondary() because when ->smp_prepare_cpus() is called, the early initcalls have not be called, so the mvebu-soc-id mechanism is not operational. Since the workaround is anyway not needed before the secondary CPU is started, we can delay its implementation until the ->smp_boot_secondary() call. Signed-off-by: Thomas Petazzoni <[email protected]> Link: https://lkml.kernel.org/r/1399302326-6917-5-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <[email protected]> commit 5093dcfb422d212ccdd22450bd986a2fb03cfb9f Author: Thomas Petazzoni <[email protected]> Date: Mon May 5 17:05:24 2014 +0200 ARM: mvebu: add Armada 375 A0 revision definition Now that we have access to Armada 375 A0 platforms, we can add the corresponding revision definition in mvebu-soc-id.h. Signed-off-by: Thomas Petazzoni <[email protected]> Link: https://lkml.kernel.org/r/1399302326-6917-4-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <[email protected]> commit 73c3c79137f05de2ffcfec3469e4110e40dd1522 Author: Thomas Petazzoni <[email protected]> Date: Mon May 5 17:05:23 2014 +0200 ARM: mvebu: initialize mvebu-soc-id earlier Currently, the mvebu-soc-id logic is initialized through a core_initcall(). However, we will soon need to know the SoC revision before booting secondary CPUs, because a workaround affects Armada 375 Z1 steppings, but should not be applied on Armada 375 A0 steppings. Unfortunately, core_initcall() are called way too late compared to the SMP initialization. Therefore, the mvebu-soc-id initialization is move to an early_initcall(), which is called before the SMP initialization. Signed-off-by: Thomas Petazzoni <[email protected]> Link: https://lkml.kernel.org/r/1399302326-6917-3-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <[email protected]> commit c1a01a0360f6744c9c1735e5db7b208df819156e Author: Thomas Petazzoni <[email protected]> Date: Mon May 5 17:05:22 2014 +0200 ARM: mvebu: fix thermal quirk SoC revision check In commit 54fe26a900bc528f3df1e4235cb6b9ca5c6d4dc2 ('ARM: mvebu: Add thermal quirk for the Armada 375 DB board'), a check on the Armada SoC revision was added to decide whether a quirk for the thermal device should be applied or not. However, the quirk implementation has a bug: it assumes mvebu_get_soc_id() returns true on success, but it returns 0. Therefore, the condition: if (mvebu_get_soc_id(&dev, &rev) && rev > ARMADA_375_Z1_REV) is always false (as long as mvebu-soc-id is properly initialized). As a consequence, the quirk is always applied, even on A0 steppings, for which the quirk should not be applied. This was spotted by testing the thermal driver on Armada 375 A0, which Ezequiel could not do since he does not have access to the A0 revision of the SoC for the moment. Signed-off-by: Thomas Petazzoni <[email protected]> Link: https://lkml.kernel.org/r/1399302326-6917-2-git-send-email-thomas.petazzoni@free-electrons.com Fixes: 54fe26a900bc528f3df1e4235cb6b9ca5c6d4dc2 ('ARM: mvebu: Add thermal quirk for the Armada 375 DB board') Acked-by: Ezequiel Garcia <[email protected]> Signed-off-by: Jason Cooper <[email protected]> commit efdf811d82b8001781087fd9174bb90a9530e578 Author: Andrew Lunn <[email protected]> Date: Sat May 3 20:30:16 2014 +0200 ARM: Kirkwood: t5325: Remove platform device to instantiate audio Remove platform device instantiating of the audio, which results in board-t5325.c being removed. A DT node will be added to take its place. Signed-off-by: Andrew Lunn <[email protected]> Link: https://lkml.kernel.org/r/[email protected] Signed-off-by: Jason Cooper <[email protected]> commit 7745b2512898e23507753513f7b5262ea1458135 Author: Andrew Lunn <[email protected]> Date: Sat May 3 20:30:12 2014 +0200 ARM: Kirkwood: Remove platform driver for codec Remove the platform driver and platform data for the audio codec. A DT node will replace it. Signed-off-by: Andrew Lunn <[email protected]> Link: https://lkml.kernel.org/r/[email protected] Signed-off-by: Jason Cooper <[email protected]> commit 5fd62066d2900b25a4fb3295ad13e3ee31474a51 Author: Ezequiel Garcia <[email protected]> Date: Thu Apr 24 17:23:22 2014 -0300 ARM: mvebu: Add thermal quirk for the Armada 375 DB board The initial release of the Armada 375 DB board has an Armada 375 Z1 stepping silicon. This commit introduces a quirk that allows to workaround a series of issues with the thermal sensor in this stepping, but updating the devicetree: * Updates the compatible string for the thermal, so the driver can perform a specific initialization of the sensor. * Moves the offset of the thermal control register. This quirk allows to specifiy the correct (A0 stepping) offset in the devicetree. Signed-off-by: Ezequiel Garcia <[email protected]> Link: https://lkml.kernel.org/r/1398371004-15807-9-git-send-email-ezequiel.garcia@free-electrons.com Signed-off-by: Jason Cooper <[email protected]> commit e9d3c849a8dc92e1019a6c7ced98f6ac231a2703 Author: Ezequiel Garcia <[email protected]> Date: Thu Apr 24 08:34:36 2014 -0300 ARM: mvebu: Select HAVE_ARM_TWD only if SMP is enabled HAVE_ARM_TWD depends on SMP, so we should only select it if SMP is enabled, as the others platforms do. Signed-off-by: Ezequiel Garcia <[email protected]> Link: https://lkml.kernel.org/r/1398339276-5754-1-git-send-email-ezequiel.garcia@free-electrons.com Signed-off-by: Jason Cooper <[email protected]> commit 8eee0f81cdaafb2fc78dcd5087a15c7f428d7751 Author: Gregory CLEMENT <[email protected]> Date: Sat Apr 19 18:32:50 2014 +0200 ARM: mvebu: fix the name of the parameter used in mvebu_get_soc_id The name of the two parameters of mvebu_get_soc_id were inverted. This patch fix it in order to have a more readable code. Reported-by: Ezequiel Garcia <[email protected]> Signed-off-by: Gregory CLEMENT <[email protected]> Link: https://lkml.kernel.org/r/1397925170-8202-3-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper <[email protected]> commit c42e1ffa269f098133629adf54cabe242596b647 Author: Gregory CLEMENT <[email protected]> Date: Sat Apr 19 18:32:49 2014 +0200 ARM: mvebu: remove unnecessary ifdef around l2x0_of_init l2x0_of_init function is always defined arch/arm/include/asm/hardware/cache-l2x0.h: in case of CONFIG_CACHE_L2X0 is not selected then a placeholder is defined. Then there is no need to have ifdef around l2x0_of_init. Signed-off-by: Gregory CLEMENT <[email protected]> Reviewed-by: Thomas Petazzoni <[email protected]> Link: https://lkml.kernel.org/r/1397925170-8202-2-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper <[email protected]> commit 8c16babc6476111efabafbb262b47f8309942403 Author: Gregory CLEMENT <[email protected]> Date: Mon Apr 14 17:10:14 2014 +0200 ARM: mvebu: register the cpuidle driver for the Armada XP SoCs The cpuidle is a platform driver so we register the device just after the initialization of the board in an arch_initcall. Signed-off-by: Gregory CLEMENT <[email protected]> Link: https://lkml.kernel.org/r/1397488214-20685-12-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper <[email protected]> commit b858fbc1919720f7f54360098ece03b383e961fa Author: Gregory CLEMENT <[email protected]> Date: Mon Apr 14 17:10:13 2014 +0200 cpuidle: mvebu: Add initial CPU idle support for Armada 370/XP SoC Add the wfi, cpu idle and cpu deep idle power states support for the Armada XP SoCs. All the latencies and the power consumption values used at the "armada_370_xp_idle_driver" structure are preliminary and will be modified in the future after running some measurements and analysis. Based on the work of Nadav Haklai. Signed-off-by: Nadav Haklai <[email protected]> Link: https://lkml.kernel.org/r/1397488214-20685-11-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Gregory CLEMENT <[email protected]> Link: https://lkml.kernel.org/r/1397488214-20685-11-git-send-email-gregory.clement@free-electrons.com Acked-by: Daniel Lezcano <[email protected]> Signed-off-by: Jason Cooper <[email protected]> commit d163ee165bd49a51f77bae632ebf37eda4899d0e Author: Gregory CLEMENT <[email protected]> Date: Mon Apr 14 17:10:12 2014 +0200 ARM: mvebu: Register notifier callback for the cpuidle transition In order to have well encapsulated code, we use notifier callbacks for CPU_PM_ENTER and CPU_PM_EXIT inside the mvebu power management code. Signed-off-by: Gregory CLEMENT <[email protected]> Link: https://lkml.kernel.org/r/1397488214-20685-10-git-send-email-gregory.clement@free-electrons.com Acked-by: Daniel Lezcano <[email protected]> Signed-off-by: Jason Cooper <[email protected]> commit 0041464ceeccd4718de228141438335e2d92f91b Author: Thomas Petazzoni <[email protected]> Date: Mon Apr 28 20:20:39 2014 +0200 ARM: mvebu: refine which files are build in mach-mvebu Following the integration into mach-mvebu of the Kirkwood ARMv5 support, we need to be more careful about which files get built. For example, the pmsu.c file now calls wfi(), which only exists on ARMv7 platforms. Therefore, this commit changes mach-mvebu/Makefile to build the Armada 370/XP/375/38x specific files only when CONFIG_MACH_MVEBU_V7 is enabled. Signed-off-by: Thomas Petazzoni <[email protected]> Link: https://lkml.kernel.org/r/1398709239-6126-1-git-send-email-thomas.petazzoni@free-electrons.com Acked-by: Gregory CLEMENT <[email protected]> Signed-off-by: Jason Cooper <[email protected]> commit c3e04cabb135625df8ff4b71ef4130f0ccbcc669 Author: Gregory CLEMENT <[email protected]> Date: Mon Apr 14 17:10:11 2014 +0200 ARM: mvebu: Add the PMSU related part of the cpu idle functions The cpu idle support will need to access to Power Management Service Unit. This commit adds the architecture related functions that will be used in the idle path of the cpuidle driver. Signed-off-by: Gregory CLEMENT <[email protected]> Link: https://lkml.kernel.org/r/1397488214-20685-9-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper <[email protected]> commit f713c7e7421d6945c977c8d8813e8089f925de41 Author: Gregory CLEMENT <[email protected]> Date: Mon Apr 14 17:10:10 2014 +0200 ARM: mvebu: Allow to power down L2 cache controller in idle mode This commit adds a function which adjusts the PMSU configuration to automatically power down the L2 and coherency fabric when we enter a certain idle state. This feature is part of the Power Management Service Unit of the Armada 370 and Armada XP SoCs. Signed-off-by: Gregory CLEMENT <[email protected]> Link: https://lkml.kernel.org/r/1397488214-20685-8-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper <[email protected]> commit 1a6bfbc339b6a2b59a8f88fa494fe70073cdb85a Author: Gregory CLEMENT <[email protected]> Date: Mon Apr 14 17:10:09 2014 +0200 ARM: mvebu: Low level function to disable HW coherency support When going to deep idle we need to disable the SoC snooping (aka hardware coherency support). Playing with the coherency fabric requires to use assembly code to be sure that the compiler doesn't reorder the instructions nor do wrong optimization. Signed-off-by: Gregory CLEMENT <[email protected]> Link: https://lkml.kernel.org/r/1397488214-20685-7-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper <[email protected]> commit 2e8a5942f8751c03fdd50228a02909654d13f01d Author: Gregory CLEMENT <[email protected]> Date: Mon Apr 14 17:10:08 2014 +0200 ARM: mvebu: Split low level functions to manipulate HW coherency Actually enabling coherency and adding a CPU on a SMP group are two different operations…
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