Chapter 6 edits #73
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Chapter 6 edits #73
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dankamongmen
commented
Sep 11, 2024
| @@ -4,15 +4,15 @@ Major CPU vendors provide a set of additional features to enhance performance an | |||
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| ### PEBS on Intel Platforms {#sec:secPEBS} | |||
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| Similar to the Last Branch Record feature, PEBS is used while profiling the program to capture additional data with every collected sample. When a performance counter is configured for PEBS, the processor saves the set of additional data, which has a defined format and is called the PEBS record. The format of a PEBS record for the Intel Skylake CPU is shown in Figure @fig:PEBS_record. The record contains the state of general-purpose registers (`EAX`, `EBX`, `ESP`, etc.), `EventingIP`, `Data Linear Address`, and `Latency value`, which will discuss later. The content layout of a PEBS record varies across different microarchitectures, see [@IntelOptimizationManual, Volume 3B, Chapter 20 Performance Monitoring]. | |||
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sneaky will-vs-we'll! boom
dankamongmen
commented
Sep 11, 2024
| @@ -1,14 +1,14 @@ | |||
| ### TMA On ARM Platforms | |||
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| ARM CPU architects also have developed a TMA performance analysis methodology for their processors, which we will discuss next. ARM calls it "Topdown" in their documentation [@ARMNeoverseV1TopDown], so we will use their naming. At the time of writing this chapter (late 2023), Topdown is only supported on cores designed by ARM, e.g. Neoverse N1 and Neoverse V1, and their derivatives, e.g. Ampere Altra and AWS Graviton3. Refer to the list of major CPU microarchitectures at the end of this book if you need to refresh your memory on ARM chip families. Processors designed by Apple don't support the ARM Topdown performance analysis methodology yet. | |||
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what you have here works, but it violates a very common idiom and sounds weird
dankamongmen
commented
Sep 11, 2024
| @@ -67,7 +67,7 @@ Stage 2 (uarch metrics) | |||
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| In the command above, the option `-n BackendBound` collects all the metrics associated with the `Backend Bound` category as well as its descendants. The description for every metric in the output is given in [@ARMNeoverseV1TopDown]. Note, that they are quite similar to what we have discussed in [@sec:PerfMetricsCaseStudy], so you may want to revisit it as well. | |||
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| We don't have a goal of optimizing the benchmark, rather we want to characterize performance bottlenecks. However, if given such a task, here is how our analysis could continue. There is a substantial number of `L1 Data TLB` misses (3.8 MPKI), but then 90% of those misses hit in L2 TLB (see `L2 Unified TLB Miss Ratio`). All in all, only 0.1% of all TLB misses result in a page table walk (see `DTLB Walk Ratio`), which suggests that it is not our primary concern, although a quick experiment that utilizes huge pages is still worth it. | |||
| We don't have a goal of optimizing the benchmark, rather we want to characterize performance bottlenecks. However, if given such a task, here is how our analysis could continue. There are a substantial number of `L1 Data TLB` misses (3.8 MPKI), but then 90% of those misses hit in L2 TLB (see `L2 Unified TLB Miss Ratio`). All in all, only 0.1% of all TLB misses result in a page table walk (see `DTLB Walk Ratio`), which suggests that it is not our primary concern, although a quick experiment that utilizes huge pages is still worthwhile. | |||
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definite number disagreement
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Some notes:
Listing 6-2: please don't cast the return value of
malloc(). this is a comp.lang.c FAQ: https://c-faq.com/malloc/mallocnocast.html .If the code is C++, it shouldn't be using
malloc().6.1.2: the reason there are no branch mispredictions in the SHA code is because cryptography code must carefully guard against dynamic branching/cache behavior to defend against timing attacks. fascinating stuff. check out DJB's papers.
6.1.4 (pg 108) is section 4.11 really the one you want to reference here? i'm not sure...?
recommendations to check things with
dmesgare pretty bad imho.dmesgdumps a ring buffer into which the kernel prints over its lifetime. different output settings can filter messages from hitting there. what you almost certainly want iscpuid,cat /proc/cpuinfo, orrdmsr. furthermore,dmesgoutput is in no way a stable api, and it's not available to regular users depending on sysctls.