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Delete VectorT size constants from minipal/cpufeatures #102946

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merged 2 commits into from
Jun 1, 2024
Merged

Delete VectorT size constants from minipal/cpufeatures #102946

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9720e0d
Delete VectorT size constants from minipal/cpufeatures
jkotas May 31, 2024
3f96534
Fix arm64
jkotas Jun 1, 2024
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22 changes: 9 additions & 13 deletions src/coreclr/tools/Common/Compiler/HardwareIntrinsicHelpers.cs
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Original file line number Diff line number Diff line change
Expand Up @@ -81,12 +81,9 @@ private static class XArchIntrinsicConstants
public const int Avx512Vbmi = 0x800000;
public const int Avx512Vbmi_vl = 0x1000000;
public const int Serialize = 0x2000000;
public const int VectorT128 = 0x4000000;
public const int VectorT256 = 0x8000000;
public const int VectorT512 = 0x10000000;
public const int Avx10v1 = 0x20000000;
public const int Avx10v1_v256 = 0x40000000;
public const int Avx10v1_v512 = unchecked((int)0x80000000);
public const int Avx10v1 = 0x4000000;
public const int Avx10v1_v256 = 0x8000000;
public const int Avx10v1_v512 = 0x10000000;

public static void AddToBuilder(InstructionSetSupportBuilder builder, int flags)
{
Expand Down Expand Up @@ -228,9 +225,9 @@ public static int FromInstructionSet(InstructionSet instructionSet)
InstructionSet.X64_X86Base_X64 => 0,

// Vector<T> Sizes
InstructionSet.X64_VectorT128 => VectorT128,
InstructionSet.X64_VectorT256 => VectorT256,
InstructionSet.X64_VectorT512 => VectorT512,
InstructionSet.X64_VectorT128 => 0,
InstructionSet.X64_VectorT256 => Avx2,
InstructionSet.X64_VectorT512 => Avx512f,

_ => throw new NotSupportedException(((InstructionSet_X64)instructionSet).ToString())
};
Expand All @@ -249,9 +246,8 @@ private static class Arm64IntrinsicConstants
public const int Sha256 = 0x0040;
public const int Atomics = 0x0080;
public const int Rcpc = 0x0100;
public const int VectorT128 = 0x0200;
public const int Rcpc2 = 0x0400;
public const int Sve = 0x0800;
public const int Rcpc2 = 0x0200;
public const int Sve = 0x0400;

public static void AddToBuilder(InstructionSetSupportBuilder builder, int flags)
{
Expand Down Expand Up @@ -310,7 +306,7 @@ public static int FromInstructionSet(InstructionSet instructionSet)
InstructionSet.ARM64_Sve_Arm64 => Sve,

// Vector<T> Sizes
InstructionSet.ARM64_VectorT128 => VectorT128,
InstructionSet.ARM64_VectorT128 => AdvSimd,

_ => throw new NotSupportedException(((InstructionSet_ARM64)instructionSet).ToString())
};
Expand Down
19 changes: 4 additions & 15 deletions src/coreclr/vm/codeman.cpp
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Expand Up @@ -1258,29 +1258,18 @@ void EEJitManager::SetCpuInfo()
int cpuFeatures = minipal_getcpufeatures();

#if defined(TARGET_X86) || defined(TARGET_AMD64)

#if defined(TARGET_X86) && !defined(TARGET_WINDOWS)
// Linux may still support no SSE/SSE2 for 32-bit
if ((cpuFeatures & XArchIntrinsicConstants_VectorT128) == 0)
{
EEPOLICY_HANDLE_FATAL_ERROR_WITH_MESSAGE(COR_E_EXECUTIONENGINE, W("SSE and SSE2 processor support required."));
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I can figure out how to add this back if we care enough about 32-bit Linux on ancient hardware (I do not not.)

}
#else
_ASSERTE((cpuFeatures & XArchIntrinsicConstants_VectorT128) != 0);
#endif

CPUCompileFlags.Set(InstructionSet_VectorT128);

// Get the maximum bitwidth of Vector<T>, rounding down to the nearest multiple of 128-bits
uint32_t maxVectorTBitWidth = (CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_MaxVectorTBitWidth) / 128) * 128;

if (((cpuFeatures & XArchIntrinsicConstants_VectorT256) != 0) && ((maxVectorTBitWidth == 0) || (maxVectorTBitWidth >= 256)))
if (((cpuFeatures & XArchIntrinsicConstants_Avx2) != 0) && ((maxVectorTBitWidth == 0) || (maxVectorTBitWidth >= 256)))
{
// We allow 256-bit Vector<T> by default
CPUCompileFlags.Set(InstructionSet_VectorT256);
}

if (((cpuFeatures & XArchIntrinsicConstants_VectorT512) != 0) && (maxVectorTBitWidth >= 512))
if (((cpuFeatures & XArchIntrinsicConstants_Avx512f) != 0) && (maxVectorTBitWidth >= 512))
{
// We require 512-bit Vector<T> to be opt-in
CPUCompileFlags.Set(InstructionSet_VectorT512);
Expand Down Expand Up @@ -1458,12 +1447,12 @@ void EEJitManager::SetCpuInfo()

#if !defined(TARGET_WINDOWS)
// Linux may still support no AdvSimd
if ((cpuFeatures & ARM64IntrinsicConstants_VectorT128) == 0)
if ((cpuFeatures & ARM64IntrinsicConstants_AdvSimd) == 0)
{
EEPOLICY_HANDLE_FATAL_ERROR_WITH_MESSAGE(COR_E_EXECUTIONENGINE, W("AdvSimd processor support required."));
}
#else
_ASSERTE((cpuFeatures & ARM64IntrinsicConstants_VectorT128) != 0);
_ASSERTE((cpuFeatures & ARM64IntrinsicConstants_AdvSimd) != 0);
#endif

CPUCompileFlags.Set(InstructionSet_VectorT128);
Expand Down
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