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Arm64/SVE: Implemented Scale and Sqrt #103663

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Jun 24, 2024
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c738b77
Added ConverToInt32 and ConvertToUInt32 for float inputs.
ebepho Jun 5, 2024
35d39d9
Added flags to handle only low predicate registers.
ebepho Jun 5, 2024
7a781e1
Fixed merge conflicts.
ebepho Jun 5, 2024
1378d60
Fix whitespace
ebepho Jun 5, 2024
10c7a15
Remove special codegen flag
ebepho Jun 7, 2024
8004868
Added new test template for operations with different return types.
ebepho Jun 10, 2024
af7ccd4
Merge branch 'main' into ConvertToInt32
ebepho Jun 10, 2024
8cb76da
Add new test template.
ebepho Jun 11, 2024
abe25fc
Added api for ConvertToInt32 and ConvertToUInt 32 for double.
ebepho Jun 13, 2024
0f51f38
fix merge conflicts.
ebepho Jun 13, 2024
7fabb91
Merge branch 'dotnet:main' into main
ebepho Jun 14, 2024
d5374ca
Merge branch 'main' of github.com:ebepho/runtime
ebepho Jun 15, 2024
4aa224d
Merge branch 'main' of github.com:ebepho/runtime
ebepho Jun 15, 2024
49a6c85
Round SVE intrinsics for floats.
ebepho Jun 16, 2024
bd2702d
Completed Round SVE fp apis.
ebepho Jun 16, 2024
56601b4
Merge branch 'main' of github.com:ebepho/runtime
ebepho Jun 17, 2024
6ba83c3
Merge branch 'main' into round
ebepho Jun 17, 2024
ba922e7
Completed sve apis for scale and sqrt, added a new test template for …
ebepho Jun 18, 2024
04071a3
Merge branch 'main' of github.com:ebepho/runtime
ebepho Jun 18, 2024
9863b7c
Merge branch 'main' into scale+sqrt
ebepho Jun 18, 2024
ffcd267
Merge branch 'main' of github.com:ebepho/runtime
ebepho Jun 18, 2024
33626b3
Merge branch 'main' of github.com:ebepho/runtime
ebepho Jun 19, 2024
dc7f4dd
Fixed test templates.
ebepho Jun 19, 2024
da441d1
Merge branch 'main' of github.com:ebepho/runtime
ebepho Jun 21, 2024
2d5b3a8
Merge branch 'main' into scale+sqrt
ebepho Jun 21, 2024
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2 changes: 2 additions & 0 deletions src/coreclr/jit/hwintrinsiclistarm64sve.h
Original file line number Diff line number Diff line change
Expand Up @@ -184,11 +184,13 @@ HARDWARE_INTRINSIC(Sve, SaturatingIncrementBy32BitElementCount,
HARDWARE_INTRINSIC(Sve, SaturatingIncrementBy64BitElementCount, -1, 3, true, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_sqincd, INS_sve_uqincd, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_HasImmediateOperand|HW_Flag_HasEnumOperand|HW_Flag_SpecialCodeGen|HW_Flag_HasScalarInputVariant|HW_Flag_SpecialImport|HW_Flag_HasRMWSemantics)
HARDWARE_INTRINSIC(Sve, SaturatingIncrementBy8BitElementCount, 0, 3, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_sqincb, INS_sve_uqincb, INS_sve_sqincb, INS_sve_uqincb, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_Scalable|HW_Flag_HasImmediateOperand|HW_Flag_HasEnumOperand|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport|HW_Flag_HasRMWSemantics)
HARDWARE_INTRINSIC(Sve, SaturatingIncrementByActiveElementCount, -1, 2, true, {INS_invalid, INS_sve_sqincp, INS_sve_sqincp, INS_sve_sqincp, INS_sve_sqincp, INS_sve_sqincp, INS_sve_sqincp, INS_sve_sqincp, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport|HW_Flag_BaseTypeFromSecondArg|HW_Flag_HasRMWSemantics)
HARDWARE_INTRINSIC(Sve, Scale, -1, -1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_fscale, INS_sve_fscale}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_BaseTypeFromFirstArg|HW_Flag_EmbeddedMaskedOperation|HW_Flag_LowMaskedOperation|HW_Flag_HasRMWSemantics)
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Don't think we need HW_Flag_BaseTypeFromFirstArg for this one. Can you double check?

HARDWARE_INTRINSIC(Sve, SignExtend16, -1, -1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_sxth, INS_invalid, INS_sve_sxth, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_EmbeddedMaskedOperation|HW_Flag_LowMaskedOperation)
HARDWARE_INTRINSIC(Sve, SignExtend32, -1, -1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_sxtw, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_EmbeddedMaskedOperation|HW_Flag_LowMaskedOperation)
HARDWARE_INTRINSIC(Sve, SignExtend8, -1, -1, false, {INS_invalid, INS_invalid, INS_sve_sxtb, INS_invalid, INS_sve_sxtb, INS_invalid, INS_sve_sxtb, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_EmbeddedMaskedOperation|HW_Flag_LowMaskedOperation)
HARDWARE_INTRINSIC(Sve, SignExtendWideningLower, -1, 1, true, {INS_sve_sunpklo, INS_invalid, INS_sve_sunpklo, INS_invalid, INS_sve_sunpklo, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_BaseTypeFromFirstArg)
HARDWARE_INTRINSIC(Sve, SignExtendWideningUpper, -1, 1, true, {INS_sve_sunpkhi, INS_invalid, INS_sve_sunpkhi, INS_invalid, INS_sve_sunpkhi, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_BaseTypeFromFirstArg)
HARDWARE_INTRINSIC(Sve, Sqrt, -1, -1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_fsqrt, INS_sve_fsqrt}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_EmbeddedMaskedOperation|HW_Flag_LowMaskedOperation)
HARDWARE_INTRINSIC(Sve, StoreAndZip, -1, 3, true, {INS_sve_st1b, INS_sve_st1b, INS_sve_st1h, INS_sve_st1h, INS_sve_st1w, INS_sve_st1w, INS_sve_st1d, INS_sve_st1d, INS_sve_st1w, INS_sve_st1d}, HW_Category_MemoryStore, HW_Flag_Scalable|HW_Flag_BaseTypeFromFirstArg|HW_Flag_ExplicitMaskedOperation|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_LowMaskedOperation)
HARDWARE_INTRINSIC(Sve, StoreNarrowing, -1, 3, true, {INS_sve_st1b, INS_sve_st1b, INS_sve_st1h, INS_sve_st1h, INS_sve_st1w, INS_sve_st1w, INS_sve_st1d, INS_sve_st1d, INS_invalid, INS_invalid}, HW_Category_MemoryStore, HW_Flag_Scalable|HW_Flag_BaseTypeFromFirstArg|HW_Flag_ExplicitMaskedOperation|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_LowMaskedOperation)
HARDWARE_INTRINSIC(Sve, StoreNonTemporal, -1, 3, true, {INS_sve_stnt1b, INS_sve_stnt1b, INS_sve_stnt1h, INS_sve_stnt1h, INS_sve_stnt1w, INS_sve_stnt1w, INS_sve_stnt1d, INS_sve_stnt1d, INS_sve_stnt1w, INS_sve_stnt1d}, HW_Category_MemoryStore, HW_Flag_Scalable|HW_Flag_BaseTypeFromFirstArg|HW_Flag_ExplicitMaskedOperation|HW_Flag_SpecialCodeGen|HW_Flag_LowMaskedOperation)
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Original file line number Diff line number Diff line change
Expand Up @@ -5026,6 +5026,27 @@ internal Arm64() { }
public static unsafe Vector<ulong> SaturatingIncrementByActiveElementCount(Vector<ulong> value, Vector<ulong> from) { throw new PlatformNotSupportedException(); }


/// Scale : Adjust exponent

/// <summary>
/// svfloat64_t svscale[_f64]_m(svbool_t pg, svfloat64_t op1, svint64_t op2)
/// FSCALE Ztied1.D, Pg/M, Ztied1.D, Zop2.D
/// svfloat64_t svscale[_f64]_x(svbool_t pg, svfloat64_t op1, svint64_t op2)
/// FSCALE Ztied1.D, Pg/M, Ztied1.D, Zop2.D
/// svfloat64_t svscale[_f64]_z(svbool_t pg, svfloat64_t op1, svint64_t op2)
/// </summary>
public static unsafe Vector<double> Scale(Vector<double> left, Vector<long> right) { throw new PlatformNotSupportedException(); }

/// <summary>
/// svfloat32_t svscale[_f32]_m(svbool_t pg, svfloat32_t op1, svint32_t op2)
/// FSCALE Ztied1.S, Pg/M, Ztied1.S, Zop2.S
/// svfloat32_t svscale[_f32]_x(svbool_t pg, svfloat32_t op1, svint32_t op2)
/// FSCALE Ztied1.S, Pg/M, Ztied1.S, Zop2.S
/// svfloat32_t svscale[_f32]_z(svbool_t pg, svfloat32_t op1, svint32_t op2)
/// </summary>
public static unsafe Vector<float> Scale(Vector<float> left, Vector<int> right) { throw new PlatformNotSupportedException(); }


/// SignExtend16 : Sign-extend the low 16 bits

/// <summary>
Expand Down Expand Up @@ -5107,6 +5128,27 @@ internal Arm64() { }
public static unsafe Vector<long> SignExtend8(Vector<long> value) { throw new PlatformNotSupportedException(); }


/// Sqrt : Square root

/// <summary>
/// svfloat64_t svsqrt[_f64]_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op)
/// FSQRT Ztied.D, Pg/M, Zop.D
/// svfloat64_t svsqrt[_f64]_x(svbool_t pg, svfloat64_t op)
/// FSQRT Ztied.D, Pg/M, Ztied.D
/// svfloat64_t svsqrt[_f64]_z(svbool_t pg, svfloat64_t op)
/// </summary>
public static unsafe Vector<double> Sqrt(Vector<double> value) { throw new PlatformNotSupportedException(); }

/// <summary>
/// svfloat32_t svsqrt[_f32]_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op)
/// FSQRT Ztied.S, Pg/M, Zop.S
/// svfloat32_t svsqrt[_f32]_x(svbool_t pg, svfloat32_t op)
/// FSQRT Ztied.S, Pg/M, Ztied.S
/// svfloat32_t svsqrt[_f32]_z(svbool_t pg, svfloat32_t op)
/// </summary>
public static unsafe Vector<float> Sqrt(Vector<float> value) { throw new PlatformNotSupportedException(); }


/// Non-truncating store

/// <summary>
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -5068,6 +5068,27 @@ internal Arm64() { }
public static unsafe Vector<ulong> SaturatingIncrementByActiveElementCount(Vector<ulong> value, Vector<ulong> from) => SaturatingIncrementByActiveElementCount(value, from);


/// Scale : Adjust exponent

/// <summary>
/// svfloat64_t svscale[_f64]_m(svbool_t pg, svfloat64_t op1, svint64_t op2)
/// FSCALE Ztied1.D, Pg/M, Ztied1.D, Zop2.D
/// svfloat64_t svscale[_f64]_x(svbool_t pg, svfloat64_t op1, svint64_t op2)
/// FSCALE Ztied1.D, Pg/M, Ztied1.D, Zop2.D
/// svfloat64_t svscale[_f64]_z(svbool_t pg, svfloat64_t op1, svint64_t op2)
/// </summary>
public static unsafe Vector<double> Scale(Vector<double> left, Vector<long> right) => Scale(left, right);

/// <summary>
/// svfloat32_t svscale[_f32]_m(svbool_t pg, svfloat32_t op1, svint32_t op2)
/// FSCALE Ztied1.S, Pg/M, Ztied1.S, Zop2.S
/// svfloat32_t svscale[_f32]_x(svbool_t pg, svfloat32_t op1, svint32_t op2)
/// FSCALE Ztied1.S, Pg/M, Ztied1.S, Zop2.S
/// svfloat32_t svscale[_f32]_z(svbool_t pg, svfloat32_t op1, svint32_t op2)
/// </summary>
public static unsafe Vector<float> Scale(Vector<float> left, Vector<int> right) => Scale(left, right);


/// SignExtend16 : Sign-extend the low 16 bits

/// <summary>
Expand Down Expand Up @@ -5190,6 +5211,27 @@ internal Arm64() { }
public static unsafe Vector<long> SignExtendWideningUpper(Vector<int> value) => SignExtendWideningUpper(value);


/// Sqrt : Square root

/// <summary>
/// svfloat64_t svsqrt[_f64]_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op)
/// FSQRT Ztied.D, Pg/M, Zop.D
/// svfloat64_t svsqrt[_f64]_x(svbool_t pg, svfloat64_t op)
/// FSQRT Ztied.D, Pg/M, Ztied.D
/// svfloat64_t svsqrt[_f64]_z(svbool_t pg, svfloat64_t op)
/// </summary>
public static unsafe Vector<double> Sqrt(Vector<double> value) => Sqrt(value);

/// <summary>
/// svfloat32_t svsqrt[_f32]_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op)
/// FSQRT Ztied.S, Pg/M, Zop.S
/// svfloat32_t svsqrt[_f32]_x(svbool_t pg, svfloat32_t op)
/// FSQRT Ztied.S, Pg/M, Ztied.S
/// svfloat32_t svsqrt[_f32]_z(svbool_t pg, svfloat32_t op)
/// </summary>
public static unsafe Vector<float> Sqrt(Vector<float> value) => Sqrt(value);


/// Non-truncating store

/// <summary>
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -4919,6 +4919,9 @@ internal Arm64() { }
public static ulong SaturatingIncrementByActiveElementCount(ulong value, System.Numerics.Vector<ulong> from) { throw null; }
public static System.Numerics.Vector<ulong> SaturatingIncrementByActiveElementCount(System.Numerics.Vector<ulong> value, System.Numerics.Vector<ulong> from) { throw null; }

public static System.Numerics.Vector<double> Scale(System.Numerics.Vector<double> left, System.Numerics.Vector<long> right) { throw null; }
public static System.Numerics.Vector<float> Scale(System.Numerics.Vector<float> left, System.Numerics.Vector<int> right) { throw null; }

public static System.Numerics.Vector<int> SignExtend16(System.Numerics.Vector<int> value) { throw null; }
public static System.Numerics.Vector<long> SignExtend16(System.Numerics.Vector<long> value) { throw null; }
public static System.Numerics.Vector<long> SignExtend32(System.Numerics.Vector<long> value) { throw null; }
Expand All @@ -4933,6 +4936,9 @@ internal Arm64() { }
public static System.Numerics.Vector<int> SignExtendWideningUpper(System.Numerics.Vector<short> value) { throw null; }
public static System.Numerics.Vector<long> SignExtendWideningUpper(System.Numerics.Vector<int> value) { throw null; }

public static System.Numerics.Vector<double> Sqrt(System.Numerics.Vector<double> value) { throw null; }
public static System.Numerics.Vector<float> Sqrt(System.Numerics.Vector<float> value) { throw null; }

public static unsafe void StoreAndZip(System.Numerics.Vector<byte> mask, byte* address, System.Numerics.Vector<byte> data) { throw null; }
public static unsafe void StoreAndZip(System.Numerics.Vector<byte> mask, byte* address, (System.Numerics.Vector<byte> Value1, System.Numerics.Vector<byte> Value2) data) { throw null; }
public static unsafe void StoreAndZip(System.Numerics.Vector<byte> mask, byte* address, (System.Numerics.Vector<byte> Value1, System.Numerics.Vector<byte> Value2, System.Numerics.Vector<byte> Value3) data) { throw null; }
Expand Down
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