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Add X64/Arm64 nested classes to System.Runtime.Intrinsics where missing #38460

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merged 7 commits into from
Jul 10, 2020
Merged

Add X64/Arm64 nested classes to System.Runtime.Intrinsics where missing #38460

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48ebd56
Ensure that Arm64 and X64 classes exist in the appropriate places for…
tannergooding Jun 26, 2020
63c1c58
Adding the new Arm64 and X64 instruction sets
tannergooding Jun 26, 2020
66bc3f5
Add a new test validating the IsSupported heirarchy is correct
tannergooding Jun 26, 2020
b5ede8e
Updating the JIT to support the new Arm64 and X64 instruction sets
tannergooding Jun 26, 2020
3e94185
Add missing new keywords
tannergooding Jun 26, 2020
1bf6827
Fixing a member name
tannergooding Jun 26, 2020
69c097f
Adding Runtime_34587 to the mono exclude list
tannergooding Jul 7, 2020
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151 changes: 124 additions & 27 deletions src/coreclr/src/inc/corinfoinstructionset.h
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Original file line number Diff line number Diff line change
Expand Up @@ -19,17 +19,20 @@ enum CORINFO_InstructionSet
InstructionSet_NONE = 63,
#ifdef TARGET_ARM64
InstructionSet_ArmBase=1,
InstructionSet_ArmBase_Arm64=2,
InstructionSet_AdvSimd=3,
InstructionSet_AdvSimd_Arm64=4,
InstructionSet_Aes=5,
InstructionSet_Crc32=6,
InstructionSet_Crc32_Arm64=7,
InstructionSet_Sha1=8,
InstructionSet_Sha256=9,
InstructionSet_Atomics=10,
InstructionSet_Vector64=11,
InstructionSet_Vector128=12,
InstructionSet_AdvSimd=2,
InstructionSet_Aes=3,
InstructionSet_Crc32=4,
InstructionSet_Sha1=5,
InstructionSet_Sha256=6,
InstructionSet_Atomics=7,
InstructionSet_Vector64=8,
InstructionSet_Vector128=9,
InstructionSet_ArmBase_Arm64=10,
InstructionSet_AdvSimd_Arm64=11,
InstructionSet_Aes_Arm64=12,
InstructionSet_Crc32_Arm64=13,
InstructionSet_Sha1_Arm64=14,
InstructionSet_Sha256_Arm64=15,
#endif // TARGET_ARM64
#ifdef TARGET_AMD64
InstructionSet_X86Base=1,
Expand All @@ -51,14 +54,21 @@ enum CORINFO_InstructionSet
InstructionSet_Vector128=17,
InstructionSet_Vector256=18,
InstructionSet_X86Base_X64=19,
InstructionSet_BMI1_X64=20,
InstructionSet_BMI2_X64=21,
InstructionSet_LZCNT_X64=22,
InstructionSet_POPCNT_X64=23,
InstructionSet_SSE_X64=24,
InstructionSet_SSE2_X64=25,
InstructionSet_SSE41_X64=26,
InstructionSet_SSE42_X64=27,
InstructionSet_SSE_X64=20,
InstructionSet_SSE2_X64=21,
InstructionSet_SSE3_X64=22,
InstructionSet_SSSE3_X64=23,
InstructionSet_SSE41_X64=24,
InstructionSet_SSE42_X64=25,
InstructionSet_AVX_X64=26,
InstructionSet_AVX2_X64=27,
InstructionSet_AES_X64=28,
InstructionSet_BMI1_X64=29,
InstructionSet_BMI2_X64=30,
InstructionSet_FMA_X64=31,
InstructionSet_LZCNT_X64=32,
InstructionSet_PCLMULQDQ_X64=33,
InstructionSet_POPCNT_X64=34,
#endif // TARGET_AMD64
#ifdef TARGET_X86
InstructionSet_X86Base=1,
Expand All @@ -80,14 +90,21 @@ enum CORINFO_InstructionSet
InstructionSet_Vector128=17,
InstructionSet_Vector256=18,
InstructionSet_X86Base_X64=19,
InstructionSet_BMI1_X64=20,
InstructionSet_BMI2_X64=21,
InstructionSet_LZCNT_X64=22,
InstructionSet_POPCNT_X64=23,
InstructionSet_SSE_X64=24,
InstructionSet_SSE2_X64=25,
InstructionSet_SSE41_X64=26,
InstructionSet_SSE42_X64=27,
InstructionSet_SSE_X64=20,
InstructionSet_SSE2_X64=21,
InstructionSet_SSE3_X64=22,
InstructionSet_SSSE3_X64=23,
InstructionSet_SSE41_X64=24,
InstructionSet_SSE42_X64=25,
InstructionSet_AVX_X64=26,
InstructionSet_AVX2_X64=27,
InstructionSet_AES_X64=28,
InstructionSet_BMI1_X64=29,
InstructionSet_BMI2_X64=30,
InstructionSet_FMA_X64=31,
InstructionSet_LZCNT_X64=32,
InstructionSet_PCLMULQDQ_X64=33,
InstructionSet_POPCNT_X64=34,
#endif // TARGET_X86

};
Expand Down Expand Up @@ -139,8 +156,14 @@ struct CORINFO_InstructionSetFlags
AddInstructionSet(InstructionSet_ArmBase_Arm64);
if (HasInstructionSet(InstructionSet_AdvSimd))
AddInstructionSet(InstructionSet_AdvSimd_Arm64);
if (HasInstructionSet(InstructionSet_Aes))
AddInstructionSet(InstructionSet_Aes_Arm64);
if (HasInstructionSet(InstructionSet_Crc32))
AddInstructionSet(InstructionSet_Crc32_Arm64);
if (HasInstructionSet(InstructionSet_Sha1))
AddInstructionSet(InstructionSet_Sha1_Arm64);
if (HasInstructionSet(InstructionSet_Sha256))
AddInstructionSet(InstructionSet_Sha256_Arm64);
#endif // TARGET_ARM64
#ifdef TARGET_AMD64
if (HasInstructionSet(InstructionSet_X86Base))
Expand All @@ -149,16 +172,30 @@ struct CORINFO_InstructionSetFlags
AddInstructionSet(InstructionSet_SSE_X64);
if (HasInstructionSet(InstructionSet_SSE2))
AddInstructionSet(InstructionSet_SSE2_X64);
if (HasInstructionSet(InstructionSet_SSE3))
AddInstructionSet(InstructionSet_SSE3_X64);
if (HasInstructionSet(InstructionSet_SSSE3))
AddInstructionSet(InstructionSet_SSSE3_X64);
if (HasInstructionSet(InstructionSet_SSE41))
AddInstructionSet(InstructionSet_SSE41_X64);
if (HasInstructionSet(InstructionSet_SSE42))
AddInstructionSet(InstructionSet_SSE42_X64);
if (HasInstructionSet(InstructionSet_AVX))
AddInstructionSet(InstructionSet_AVX_X64);
if (HasInstructionSet(InstructionSet_AVX2))
AddInstructionSet(InstructionSet_AVX2_X64);
if (HasInstructionSet(InstructionSet_AES))
AddInstructionSet(InstructionSet_AES_X64);
if (HasInstructionSet(InstructionSet_BMI1))
AddInstructionSet(InstructionSet_BMI1_X64);
if (HasInstructionSet(InstructionSet_BMI2))
AddInstructionSet(InstructionSet_BMI2_X64);
if (HasInstructionSet(InstructionSet_FMA))
AddInstructionSet(InstructionSet_FMA_X64);
if (HasInstructionSet(InstructionSet_LZCNT))
AddInstructionSet(InstructionSet_LZCNT_X64);
if (HasInstructionSet(InstructionSet_PCLMULQDQ))
AddInstructionSet(InstructionSet_PCLMULQDQ_X64);
if (HasInstructionSet(InstructionSet_POPCNT))
AddInstructionSet(InstructionSet_POPCNT_X64);
#endif // TARGET_AMD64
Expand Down Expand Up @@ -194,10 +231,22 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins
resultflags.RemoveInstructionSet(InstructionSet_AdvSimd);
if (resultflags.HasInstructionSet(InstructionSet_AdvSimd_Arm64) && !resultflags.HasInstructionSet(InstructionSet_AdvSimd))
resultflags.RemoveInstructionSet(InstructionSet_AdvSimd_Arm64);
if (resultflags.HasInstructionSet(InstructionSet_Aes) && !resultflags.HasInstructionSet(InstructionSet_Aes_Arm64))
resultflags.RemoveInstructionSet(InstructionSet_Aes);
if (resultflags.HasInstructionSet(InstructionSet_Aes_Arm64) && !resultflags.HasInstructionSet(InstructionSet_Aes))
resultflags.RemoveInstructionSet(InstructionSet_Aes_Arm64);
if (resultflags.HasInstructionSet(InstructionSet_Crc32) && !resultflags.HasInstructionSet(InstructionSet_Crc32_Arm64))
resultflags.RemoveInstructionSet(InstructionSet_Crc32);
if (resultflags.HasInstructionSet(InstructionSet_Crc32_Arm64) && !resultflags.HasInstructionSet(InstructionSet_Crc32))
resultflags.RemoveInstructionSet(InstructionSet_Crc32_Arm64);
if (resultflags.HasInstructionSet(InstructionSet_Sha1) && !resultflags.HasInstructionSet(InstructionSet_Sha1_Arm64))
resultflags.RemoveInstructionSet(InstructionSet_Sha1);
if (resultflags.HasInstructionSet(InstructionSet_Sha1_Arm64) && !resultflags.HasInstructionSet(InstructionSet_Sha1))
resultflags.RemoveInstructionSet(InstructionSet_Sha1_Arm64);
if (resultflags.HasInstructionSet(InstructionSet_Sha256) && !resultflags.HasInstructionSet(InstructionSet_Sha256_Arm64))
resultflags.RemoveInstructionSet(InstructionSet_Sha256);
if (resultflags.HasInstructionSet(InstructionSet_Sha256_Arm64) && !resultflags.HasInstructionSet(InstructionSet_Sha256))
resultflags.RemoveInstructionSet(InstructionSet_Sha256_Arm64);
if (resultflags.HasInstructionSet(InstructionSet_AdvSimd) && !resultflags.HasInstructionSet(InstructionSet_ArmBase))
resultflags.RemoveInstructionSet(InstructionSet_AdvSimd);
if (resultflags.HasInstructionSet(InstructionSet_Aes) && !resultflags.HasInstructionSet(InstructionSet_ArmBase))
Expand All @@ -222,6 +271,14 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins
resultflags.RemoveInstructionSet(InstructionSet_SSE2);
if (resultflags.HasInstructionSet(InstructionSet_SSE2_X64) && !resultflags.HasInstructionSet(InstructionSet_SSE2))
resultflags.RemoveInstructionSet(InstructionSet_SSE2_X64);
if (resultflags.HasInstructionSet(InstructionSet_SSE3) && !resultflags.HasInstructionSet(InstructionSet_SSE3_X64))
resultflags.RemoveInstructionSet(InstructionSet_SSE3);
if (resultflags.HasInstructionSet(InstructionSet_SSE3_X64) && !resultflags.HasInstructionSet(InstructionSet_SSE3))
resultflags.RemoveInstructionSet(InstructionSet_SSE3_X64);
if (resultflags.HasInstructionSet(InstructionSet_SSSE3) && !resultflags.HasInstructionSet(InstructionSet_SSSE3_X64))
resultflags.RemoveInstructionSet(InstructionSet_SSSE3);
if (resultflags.HasInstructionSet(InstructionSet_SSSE3_X64) && !resultflags.HasInstructionSet(InstructionSet_SSSE3))
resultflags.RemoveInstructionSet(InstructionSet_SSSE3_X64);
if (resultflags.HasInstructionSet(InstructionSet_SSE41) && !resultflags.HasInstructionSet(InstructionSet_SSE41_X64))
resultflags.RemoveInstructionSet(InstructionSet_SSE41);
if (resultflags.HasInstructionSet(InstructionSet_SSE41_X64) && !resultflags.HasInstructionSet(InstructionSet_SSE41))
Expand All @@ -230,6 +287,18 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins
resultflags.RemoveInstructionSet(InstructionSet_SSE42);
if (resultflags.HasInstructionSet(InstructionSet_SSE42_X64) && !resultflags.HasInstructionSet(InstructionSet_SSE42))
resultflags.RemoveInstructionSet(InstructionSet_SSE42_X64);
if (resultflags.HasInstructionSet(InstructionSet_AVX) && !resultflags.HasInstructionSet(InstructionSet_AVX_X64))
resultflags.RemoveInstructionSet(InstructionSet_AVX);
if (resultflags.HasInstructionSet(InstructionSet_AVX_X64) && !resultflags.HasInstructionSet(InstructionSet_AVX))
resultflags.RemoveInstructionSet(InstructionSet_AVX_X64);
if (resultflags.HasInstructionSet(InstructionSet_AVX2) && !resultflags.HasInstructionSet(InstructionSet_AVX2_X64))
resultflags.RemoveInstructionSet(InstructionSet_AVX2);
if (resultflags.HasInstructionSet(InstructionSet_AVX2_X64) && !resultflags.HasInstructionSet(InstructionSet_AVX2))
resultflags.RemoveInstructionSet(InstructionSet_AVX2_X64);
if (resultflags.HasInstructionSet(InstructionSet_AES) && !resultflags.HasInstructionSet(InstructionSet_AES_X64))
resultflags.RemoveInstructionSet(InstructionSet_AES);
if (resultflags.HasInstructionSet(InstructionSet_AES_X64) && !resultflags.HasInstructionSet(InstructionSet_AES))
resultflags.RemoveInstructionSet(InstructionSet_AES_X64);
if (resultflags.HasInstructionSet(InstructionSet_BMI1) && !resultflags.HasInstructionSet(InstructionSet_BMI1_X64))
resultflags.RemoveInstructionSet(InstructionSet_BMI1);
if (resultflags.HasInstructionSet(InstructionSet_BMI1_X64) && !resultflags.HasInstructionSet(InstructionSet_BMI1))
Expand All @@ -238,10 +307,18 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins
resultflags.RemoveInstructionSet(InstructionSet_BMI2);
if (resultflags.HasInstructionSet(InstructionSet_BMI2_X64) && !resultflags.HasInstructionSet(InstructionSet_BMI2))
resultflags.RemoveInstructionSet(InstructionSet_BMI2_X64);
if (resultflags.HasInstructionSet(InstructionSet_FMA) && !resultflags.HasInstructionSet(InstructionSet_FMA_X64))
resultflags.RemoveInstructionSet(InstructionSet_FMA);
if (resultflags.HasInstructionSet(InstructionSet_FMA_X64) && !resultflags.HasInstructionSet(InstructionSet_FMA))
resultflags.RemoveInstructionSet(InstructionSet_FMA_X64);
if (resultflags.HasInstructionSet(InstructionSet_LZCNT) && !resultflags.HasInstructionSet(InstructionSet_LZCNT_X64))
resultflags.RemoveInstructionSet(InstructionSet_LZCNT);
if (resultflags.HasInstructionSet(InstructionSet_LZCNT_X64) && !resultflags.HasInstructionSet(InstructionSet_LZCNT))
resultflags.RemoveInstructionSet(InstructionSet_LZCNT_X64);
if (resultflags.HasInstructionSet(InstructionSet_PCLMULQDQ) && !resultflags.HasInstructionSet(InstructionSet_PCLMULQDQ_X64))
resultflags.RemoveInstructionSet(InstructionSet_PCLMULQDQ);
if (resultflags.HasInstructionSet(InstructionSet_PCLMULQDQ_X64) && !resultflags.HasInstructionSet(InstructionSet_PCLMULQDQ))
resultflags.RemoveInstructionSet(InstructionSet_PCLMULQDQ_X64);
if (resultflags.HasInstructionSet(InstructionSet_POPCNT) && !resultflags.HasInstructionSet(InstructionSet_POPCNT_X64))
resultflags.RemoveInstructionSet(InstructionSet_POPCNT);
if (resultflags.HasInstructionSet(InstructionSet_POPCNT_X64) && !resultflags.HasInstructionSet(InstructionSet_POPCNT))
Expand Down Expand Up @@ -334,14 +411,20 @@ inline const char *InstructionSetToString(CORINFO_InstructionSet instructionSet)
return "AdvSimd_Arm64";
case InstructionSet_Aes :
return "Aes";
case InstructionSet_Aes_Arm64 :
return "Aes_Arm64";
case InstructionSet_Crc32 :
return "Crc32";
case InstructionSet_Crc32_Arm64 :
return "Crc32_Arm64";
case InstructionSet_Sha1 :
return "Sha1";
case InstructionSet_Sha1_Arm64 :
return "Sha1_Arm64";
case InstructionSet_Sha256 :
return "Sha256";
case InstructionSet_Sha256_Arm64 :
return "Sha256_Arm64";
case InstructionSet_Atomics :
return "Atomics";
case InstructionSet_Vector64 :
Expand All @@ -364,8 +447,12 @@ inline const char *InstructionSetToString(CORINFO_InstructionSet instructionSet)
return "SSE2_X64";
case InstructionSet_SSE3 :
return "SSE3";
case InstructionSet_SSE3_X64 :
return "SSE3_X64";
case InstructionSet_SSSE3 :
return "SSSE3";
case InstructionSet_SSSE3_X64 :
return "SSSE3_X64";
case InstructionSet_SSE41 :
return "SSE41";
case InstructionSet_SSE41_X64 :
Expand All @@ -376,10 +463,16 @@ inline const char *InstructionSetToString(CORINFO_InstructionSet instructionSet)
return "SSE42_X64";
case InstructionSet_AVX :
return "AVX";
case InstructionSet_AVX_X64 :
return "AVX_X64";
case InstructionSet_AVX2 :
return "AVX2";
case InstructionSet_AVX2_X64 :
return "AVX2_X64";
case InstructionSet_AES :
return "AES";
case InstructionSet_AES_X64 :
return "AES_X64";
case InstructionSet_BMI1 :
return "BMI1";
case InstructionSet_BMI1_X64 :
Expand All @@ -390,12 +483,16 @@ inline const char *InstructionSetToString(CORINFO_InstructionSet instructionSet)
return "BMI2_X64";
case InstructionSet_FMA :
return "FMA";
case InstructionSet_FMA_X64 :
return "FMA_X64";
case InstructionSet_LZCNT :
return "LZCNT";
case InstructionSet_LZCNT_X64 :
return "LZCNT_X64";
case InstructionSet_PCLMULQDQ :
return "PCLMULQDQ";
case InstructionSet_PCLMULQDQ_X64 :
return "PCLMULQDQ_X64";
case InstructionSet_POPCNT :
return "POPCNT";
case InstructionSet_POPCNT_X64 :
Expand Down
9 changes: 9 additions & 0 deletions src/coreclr/src/jit/hwintrinsicarm64.cpp
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Expand Up @@ -21,10 +21,16 @@ static CORINFO_InstructionSet Arm64VersionOfIsa(CORINFO_InstructionSet isa)
{
case InstructionSet_AdvSimd:
return InstructionSet_AdvSimd_Arm64;
case InstructionSet_Aes:
return InstructionSet_Aes_Arm64;
case InstructionSet_ArmBase:
return InstructionSet_ArmBase_Arm64;
case InstructionSet_Crc32:
return InstructionSet_Crc32_Arm64;
case InstructionSet_Sha1:
return InstructionSet_Sha1_Arm64;
case InstructionSet_Sha256:
return InstructionSet_Sha256_Arm64;
default:
return InstructionSet_NONE;
}
Expand Down Expand Up @@ -130,12 +136,15 @@ bool HWIntrinsicInfo::isFullyImplementedIsa(CORINFO_InstructionSet isa)
case InstructionSet_AdvSimd:
case InstructionSet_AdvSimd_Arm64:
case InstructionSet_Aes:
case InstructionSet_Aes_Arm64:
case InstructionSet_ArmBase:
case InstructionSet_ArmBase_Arm64:
case InstructionSet_Crc32:
case InstructionSet_Crc32_Arm64:
case InstructionSet_Sha1:
case InstructionSet_Sha1_Arm64:
case InstructionSet_Sha256:
case InstructionSet_Sha256_Arm64:
case InstructionSet_Vector64:
case InstructionSet_Vector128:
{
Expand Down
25 changes: 23 additions & 2 deletions src/coreclr/src/jit/hwintrinsicxarch.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -25,16 +25,30 @@ static CORINFO_InstructionSet X64VersionOfIsa(CORINFO_InstructionSet isa)
return InstructionSet_SSE_X64;
case InstructionSet_SSE2:
return InstructionSet_SSE2_X64;
case InstructionSet_SSE3:
return InstructionSet_SSE3_X64;
case InstructionSet_SSSE3:
return InstructionSet_SSSE3_X64;
case InstructionSet_SSE41:
return InstructionSet_SSE41_X64;
case InstructionSet_SSE42:
return InstructionSet_SSE42_X64;
case InstructionSet_AVX:
return InstructionSet_AVX_X64;
case InstructionSet_AVX2:
return InstructionSet_AVX2_X64;
case InstructionSet_AES:
return InstructionSet_AES_X64;
case InstructionSet_BMI1:
return InstructionSet_BMI1_X64;
case InstructionSet_BMI2:
return InstructionSet_BMI2_X64;
case InstructionSet_FMA:
return InstructionSet_FMA_X64;
case InstructionSet_LZCNT:
return InstructionSet_LZCNT_X64;
case InstructionSet_PCLMULQDQ:
return InstructionSet_PCLMULQDQ_X64;
case InstructionSet_POPCNT:
return InstructionSet_POPCNT_X64;
default:
Expand Down Expand Up @@ -330,24 +344,31 @@ bool HWIntrinsicInfo::isFullyImplementedIsa(CORINFO_InstructionSet isa)
{
// These ISAs are fully implemented
case InstructionSet_AES:
case InstructionSet_AES_X64:
case InstructionSet_AVX:
case InstructionSet_AVX_X64:
case InstructionSet_AVX2:
case InstructionSet_AVX2_X64:
case InstructionSet_BMI1:
case InstructionSet_BMI2:
case InstructionSet_BMI1_X64:
case InstructionSet_BMI2:
case InstructionSet_BMI2_X64:
case InstructionSet_FMA:
case InstructionSet_FMA_X64:
case InstructionSet_LZCNT:
case InstructionSet_LZCNT_X64:
case InstructionSet_PCLMULQDQ:
case InstructionSet_PCLMULQDQ_X64:
case InstructionSet_POPCNT:
case InstructionSet_POPCNT_X64:
case InstructionSet_SSE:
case InstructionSet_SSE_X64:
case InstructionSet_SSE2:
case InstructionSet_SSE2_X64:
case InstructionSet_SSE3:
case InstructionSet_SSE3_X64:
case InstructionSet_SSSE3:
case InstructionSet_SSSE3_X64:
case InstructionSet_SSE41:
case InstructionSet_SSE41_X64:
case InstructionSet_SSE42:
Expand Down Expand Up @@ -380,8 +401,8 @@ bool HWIntrinsicInfo::isScalarIsa(CORINFO_InstructionSet isa)
switch (isa)
{
case InstructionSet_BMI1:
case InstructionSet_BMI2:
case InstructionSet_BMI1_X64:
case InstructionSet_BMI2:
case InstructionSet_BMI2_X64:
case InstructionSet_LZCNT:
case InstructionSet_LZCNT_X64:
Expand Down
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