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Use SIMD operations in InitBlkUnroll/CopyBlkUnroll and increase unroll limit up to 128 bytes #61030

Merged
merged 16 commits into from
Dec 28, 2021
Merged

Use SIMD operations in InitBlkUnroll/CopyBlkUnroll and increase unroll limit up to 128 bytes #61030

merged 16 commits into from
Dec 28, 2021

Commits on Dec 1, 2021

  1. Use SIMD operations in CodeGen::genCodeForInitBlkUnroll()

    @echesakov
    echesakov committed Dec 1, 2021
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  2. Use SIMD operations in CodeGen::genCodeForCpBlkUnroll()

    @echesakov
    echesakov committed Dec 1, 2021
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Commits on Dec 2, 2021

  1. Remove restrictions on offset in Lowering::ContainBlockStoreAddress()

    @echesakov
    echesakov committed Dec 2, 2021
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Commits on Dec 21, 2021

  1. Remove unused macros in src/coreclr/jit/instr.h

    @echesakov
    echesakov committed Dec 21, 2021
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  2. Rename FPbased -> fpBased in src/coreclr/jit/codegenarmarch.cpp

    @echesakov
    echesakov committed Dec 21, 2021
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  3. Split Arm32 and Arm64 logic around srcReg in CodeGen::genCodeForInitB… 

    …lkUnroll() in src/coreclr/jit/codegenarmarch.cpp
    @echesakov
    echesakov committed Dec 21, 2021
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  4. Change int -> unsigned for InstrCount in CountingStream in src/corecl… 

    …r/jit/codegenarmarch.cpp
    @echesakov
    echesakov committed Dec 21, 2021
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  5. Change int -> unsigned for InstrCount in InitBlockUnrollHelper and Co… 

    …pyBlockUnrollHelper in src/coreclr/jit/codegenarmarch.cpp
    @echesakov
    echesakov committed Dec 21, 2021
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  6. Allocate an integer register in LSRA instead of relying on rsGetRsvdR… 

    …eg for InitBlock in src/coreclr/jit/lsraarmarch.cpp
    @echesakov
    echesakov committed Dec 21, 2021
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  7. Allocate an integer register in LSRA instead of relying on rsGetRsvdR… 

    …eg for CopyBlock in src/coreclr/jit/lsraarmarch.cpp
    @echesakov
    echesakov committed Dec 21, 2021
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  8. Change int -> unsigned for regSizeBytes in src/coreclr/jit/codegenarm… 

    …arch.cpp
    @echesakov
    echesakov committed Dec 21, 2021
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  9. Move encoding-related logic to the emitter - add emitter::canEncodeLo… 

    …adOrStorePairOffset() helper in src/coreclr/jit/emitarm64.h src/coreclr/jit/emitarm64.cpp
    @echesakov
    echesakov committed Dec 21, 2021
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Commits on Dec 22, 2021

  1. Re-structure Streams and Helpers and describe the design in src/corec… 

    …lr/jit/codegenarmarch.cpp
    @echesakov
    echesakov committed Dec 22, 2021
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  2. Re-structure CodeGen::genCodeForInitBlkUnroll() in src/coreclr/jit/co… 

    …degenarmarch.cpp
    @echesakov
    echesakov committed Dec 22, 2021
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  3. Re-structure CodeGen::genCodeForCpBlkUnroll() in src/coreclr/jit/code… 

    …genarmarch.cpp
    @echesakov
    echesakov committed Dec 22, 2021
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Commits on Dec 23, 2021

  1. Change how LSRA allocates int/SIMD registers when both srcAddr/dstAdd… 

    …r are contained and can potentially occupy up to 2 int registers
    @echesakov
    echesakov committed Dec 23, 2021
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