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remove fprintf(stderr, ...)
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jjsuwa-sys3175 committed Dec 20, 2021
1 parent fe4a987 commit 815327b
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Showing 7 changed files with 63 additions and 150 deletions.
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
From 94ca26d6669ff457166a544e2dd2823d8ca5597f Mon Sep 17 00:00:00 2001
From 5567016085ff8de0943c945dafcadcbe0c40493b Mon Sep 17 00:00:00 2001
From: Takayuki 'January June' Suwa <[email protected]>
Date: Fri, 21 May 2021 20:40:05 +0900
Subject: [PATCH 06/13] GCC: xtensa (xtensa_expand_block_set): add setmemsi
Expand All @@ -7,11 +7,11 @@ Subject: [PATCH 06/13] GCC: xtensa (xtensa_expand_block_set): add setmemsi
- currently, works only for fixed length and constant initialization value
- moderate expansion threshold for now, almost no increase in size even if optimizing for speed
---
gcc/config/xtensa/xtensa-protos.h | 1 +
gcc/config/xtensa/xtensa.c | 100 ++++++++++++++++++++++++++++++
gcc/config/xtensa/xtensa.md | 14 +++++
gcc/config/xtensa/xtensa.opt | 2 +-
4 files changed, 116 insertions(+), 1 deletion(-)
gcc/config/xtensa/xtensa-protos.h | 1 +
gcc/config/xtensa/xtensa.c | 87 +++++++++++++++++++++++++++++++
gcc/config/xtensa/xtensa.md | 14 +++++
gcc/config/xtensa/xtensa.opt | 2 +-
4 files changed, 103 insertions(+), 1 deletion(-)

diff --git a/gcc/config/xtensa/xtensa-protos.h b/gcc/config/xtensa/xtensa-protos.h
index 18d803581..ecf6789cc 100644
Expand All @@ -26,10 +26,10 @@ index 18d803581..ecf6789cc 100644
extern int xtensa_emit_move_sequence (rtx *, machine_mode);
extern rtx xtensa_copy_incoming_a7 (rtx);
diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c
index d4048b102..694a7d22a 100644
index d4048b102..3b3671a2e 100644
--- a/gcc/config/xtensa/xtensa.c
+++ b/gcc/config/xtensa/xtensa.c
@@ -1364,6 +1364,106 @@ xtensa_expand_block_move (rtx *operands)
@@ -1364,6 +1364,93 @@ xtensa_expand_block_move (rtx *operands)
}


Expand All @@ -51,7 +51,6 @@ index d4048b102..694a7d22a 100644
+ HOST_WIDE_INT bytes, value, align;
+ int insns_len, insns_len_threshold;
+ rtx x, reg;
+ int insns;
+ int offset;
+
+ /* If this is not a fixed size set, just call memset. */
Expand Down Expand Up @@ -89,21 +88,14 @@ index d4048b102..694a7d22a 100644
+ + (TARGET_LONGCALLS ? 4 + 3 + 3 : 3);
+ /* call subroutine (CALLn / litpool + L32R + CALLXn). */
+ if (insns_len > insns_len_threshold)
+ {
+ fprintf (stderr, "[xtensa_expand_block_set @ %s(), line %d] insns_len=%d, threshold=%d; not expanded\n",
+ current_function_name (), LOCATION_LINE (curr_insn_location ()),
+ insns_len, insns_len_threshold);
+
+ return 0;
+ }
+ return 0;
+
+ x = XEXP (dst_mem, 0);
+ if (!REG_P (x))
+ dst_mem = replace_equiv_address (dst_mem, force_reg (Pmode, x));
+
+ reg = gen_reg_rtx (SImode);
+ emit_move_insn (reg, GEN_INT ((int32_t)(value * 0x01010101)));
+ insns = 1;
+ offset = 0;
+ do
+ {
Expand All @@ -119,16 +111,11 @@ index d4048b102..694a7d22a 100644
+ emit_insn (gen_rtx_SET (adjust_address (dst_mem, unit_mode, offset),
+ x));
+
+ insns += 1;
+ offset += unit_size;
+ bytes -= unit_size;
+ }
+ while (bytes > 0);
+
+ fprintf (stderr, "[xtensa_expand_block_set @ %s(), line %d] insns_len=%d, threshold=%d; expanded to %d insns\n",
+ current_function_name (), LOCATION_LINE (curr_insn_location ()),
+ insns_len, insns_len_threshold, insns);
+
+ return 1;
+}
+
Expand Down
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
From 1c65ff45ea4c2995b53995a4fa7fe2877367fb9c Mon Sep 17 00:00:00 2001
From 6f5b921e0f1fa7478a38999a216c4dc2a2258b1d Mon Sep 17 00:00:00 2001
From: Takayuki 'January June' Suwa <[email protected]>
Date: Sat, 1 May 2021 15:49:53 +0900
Subject: [PATCH 08/13] GCC: xtensa (xtensa_rtx_costs): correct missing/wrong
Expand All @@ -9,10 +9,10 @@ Subject: [PATCH 08/13] GCC: xtensa (xtensa_rtx_costs): correct missing/wrong
1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c
index 694a7d22a..a7e4fa438 100644
index 3b3671a2e..d1716bac0 100644
--- a/gcc/config/xtensa/xtensa.c
+++ b/gcc/config/xtensa/xtensa.c
@@ -3917,11 +3917,18 @@ xtensa_rtx_costs (rtx x, machine_mode mode, int outer_code,
@@ -3904,11 +3904,18 @@ xtensa_rtx_costs (rtx x, machine_mode mode, int outer_code,

case FFS:
case CTZ:
Expand Down
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
From 4fcb60bdc072ab69b2b3315fc318e6fc7d5b77ac Mon Sep 17 00:00:00 2001
From baa779575a241761e1878fdd40bf25554b98923a Mon Sep 17 00:00:00 2001
From: Takayuki 'January June' Suwa <[email protected]>
Date: Tue, 18 May 2021 01:30:25 +0900
Subject: [PATCH 09/13] GCC: xtensa (xtensa_emit_move_sequence): improve 32-bit
Expand All @@ -11,11 +11,11 @@ Subject: [PATCH 09/13] GCC: xtensa (xtensa_emit_move_sequence): improve 32-bit
iii. written as a power of two minus one (eg. 32767, 65535 or 0x7fffffffUL)
- become more CSE-friendly
---
gcc/config/xtensa/xtensa.c | 109 ++++++++++++++++++++++++++++++++++---
1 file changed, 102 insertions(+), 7 deletions(-)
gcc/config/xtensa/xtensa.c | 85 ++++++++++++++++++++++++++++++++++----
1 file changed, 78 insertions(+), 7 deletions(-)

diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c
index a7e4fa438..4197359ba 100644
index d1716bac0..5433ffc2a 100644
--- a/gcc/config/xtensa/xtensa.c
+++ b/gcc/config/xtensa/xtensa.c
@@ -1024,6 +1024,33 @@ xtensa_split_operand_pair (rtx operands[4], machine_mode mode)
Expand Down Expand Up @@ -52,7 +52,7 @@ index a7e4fa438..4197359ba 100644
/* Emit insns to move operands[1] into operands[0].
Return 1 if we have written out everything that needs to be done to
do the move. Otherwise, return 0 and the caller will emit the move
@@ -1061,19 +1088,87 @@ xtensa_emit_move_sequence (rtx *operands, machine_mode mode)
@@ -1061,19 +1088,63 @@ xtensa_emit_move_sequence (rtx *operands, machine_mode mode)

if (! TARGET_AUTO_LITPOOLS && ! TARGET_CONST16)
{
Expand Down Expand Up @@ -86,13 +86,7 @@ index a7e4fa438..4197359ba 100644
+ lo = srcval - hi;
+ if (xtensa_emit_const_synth_sequence (dst, gen_addsi3,
+ hi, lo))
+ {
+ fprintf (stderr, "[xtensa_const_synth @ %s(), line %d] '" HOST_WIDE_INT_PRINT_DEC "' = '" HOST_WIDE_INT_PRINT_DEC " + " HOST_WIDE_INT_PRINT_DEC "'\n",
+ current_function_name (), LOCATION_LINE (curr_insn_location ()),
+ srcval, hi, lo);
+
+ return 1;
+ }
+ return 1;
+ }
+
+ /* Synthesize a constant by "MOVI imm12" + "ADDMI imm8"
Expand All @@ -108,13 +102,7 @@ index a7e4fa438..4197359ba 100644
+ lo = srcval - hi;
+ if (xtensa_emit_const_synth_sequence (dst, gen_addsi3,
+ lo, hi))
+ {
+ fprintf (stderr, "[xtensa_const_synth @ %s(), line %d] '" HOST_WIDE_INT_PRINT_DEC "' = '" HOST_WIDE_INT_PRINT_DEC " + " HOST_WIDE_INT_PRINT_DEC "'\n",
+ current_function_name (), LOCATION_LINE (curr_insn_location ()),
+ srcval, lo, hi);
+
+ return 1;
+ }
+ return 1;
+ }
+
+ /* Synthesize a constant by "MOVI -1" + "SRLI/EXTUI"
Expand All @@ -123,27 +111,15 @@ index a7e4fa438..4197359ba 100644
+ if (shift >= 1 && shift <= 31
+ && xtensa_emit_const_synth_sequence (dst, gen_lshrsi3,
+ -1, 32 - shift))
+ {
+ fprintf (stderr, "[xtensa_const_synth @ %s(), line %d] '" HOST_WIDE_INT_PRINT_DEC "' = '-1U >> %d'\n",
+ current_function_name (), LOCATION_LINE (curr_insn_location ()),
+ srcval, 32 - shift);
+
+ return 1;
+ }
+ return 1;
+
+ /* Synthesize a constant by "MOVI imm12" + "SLLI" sequence
+ (5 or 6 bytes). */
+ shift = ctz_hwi (srcval);
+ if (xtensa_simm12b (srcval >> shift)
+ && xtensa_emit_const_synth_sequence (dst, gen_ashlsi3_internal,
+ srcval >> shift, shift))
+ {
+ fprintf (stderr, "[xtensa_const_synth @ %s(), line %d] '" HOST_WIDE_INT_PRINT_DEC "' = '" HOST_WIDE_INT_PRINT_DEC " << %d'\n",
+ current_function_name (), LOCATION_LINE (curr_insn_location ()),
+ srcval, srcval >> shift, shift);
+
+ return 1;
+ }
+ return 1;
}
}

Expand Down
52 changes: 13 additions & 39 deletions patches/gcc10.3/gcc-xtensa-0016-improve-shift-operations-more.patch
Original file line number Diff line number Diff line change
@@ -1,17 +1,17 @@
From 8c748ed880607494b7cb1ac41b07f6e912fdc2e0 Mon Sep 17 00:00:00 2001
From 1d91a6a3621b018b3c255dfc3533b479e3904a8c Mon Sep 17 00:00:00 2001
From: Takayuki 'January June' Suwa <[email protected]>
Date: Sun, 2 May 2021 09:10:44 +0900
Subject: [PATCH 10/13] GCC: xtensa: improve shift operations more

- rearrange ashlsi3_internal, xtensa_shift_3x and xtensa_shift_3x_1
- rearrange ashlsi3_internal, xtensa_shift_3x and xtensa_shift_3x_alt
- add *xtensa_sh[lr]d patterns (aka. funnel shifts), that mimic ones in i386 ISA
---
gcc/config/xtensa/constraints.md | 7 ++
gcc/config/xtensa/predicates.md | 6 +
gcc/config/xtensa/predicates.md | 6 ++
gcc/config/xtensa/xtensa-protos.h | 1 +
gcc/config/xtensa/xtensa.c | 13 ++
gcc/config/xtensa/xtensa.md | 191 +++++++++++++++++++++++-------
5 files changed, 176 insertions(+), 42 deletions(-)
gcc/config/xtensa/xtensa.c | 13 +++
gcc/config/xtensa/xtensa.md | 165 ++++++++++++++++++++++--------
5 files changed, 150 insertions(+), 42 deletions(-)

diff --git a/gcc/config/xtensa/constraints.md b/gcc/config/xtensa/constraints.md
index 2062c8816..7696e881f 100644
Expand Down Expand Up @@ -64,10 +64,10 @@ index ecf6789cc..7f7a93e99 100644
#ifdef TREE_CODE
extern void init_cumulative_args (CUMULATIVE_ARGS *, int);
diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c
index 4197359ba..89400dbf9 100644
index 5433ffc2a..ce0612e46 100644
--- a/gcc/config/xtensa/xtensa.c
+++ b/gcc/config/xtensa/xtensa.c
@@ -2245,6 +2245,19 @@ xtensa_tls_referenced_p (rtx x)
@@ -2208,6 +2208,19 @@ xtensa_tls_referenced_p (rtx x)
}


Expand All @@ -88,7 +88,7 @@ index 4197359ba..89400dbf9 100644

static bool
diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md
index 05ee7afcb..e0ae9d79a 100644
index 05ee7afcb..387a1eaf7 100644
--- a/gcc/config/xtensa/xtensa.md
+++ b/gcc/config/xtensa/xtensa.md
@@ -1121,38 +1121,18 @@
Expand Down Expand Up @@ -118,8 +118,7 @@ index 05ee7afcb..e0ae9d79a 100644
slli\t%0, %1, %R2
ssl\t%2\;sll\t%0, %1"
- [(set_attr "type" "arith,arith")
+ [(set_attr "type" "arith,arith,arith")
(set_attr "mode" "SI")
- (set_attr "mode" "SI")
- (set_attr "length" "3,6")])
-
-(define_insn "*ashlsi3_3x"
Expand All @@ -130,7 +129,8 @@ index 05ee7afcb..e0ae9d79a 100644
- ""
- "ssa8b\t%2\;sll\t%0, %1"
- [(set_attr "type" "arith")
- (set_attr "mode" "SI")
+ [(set_attr "type" "arith,arith,arith")
(set_attr "mode" "SI")
- (set_attr "length" "6")])
+ (set_attr "length" "2,3,6")])

Expand All @@ -154,7 +154,7 @@ index 05ee7afcb..e0ae9d79a 100644
(define_insn "lshrsi3"
[(set (match_operand:SI 0 "register_operand" "=a,a")
(lshiftrt:SI (match_operand:SI 1 "register_operand" "r,r")
@@ -1196,13 +1165,151 @@
@@ -1196,13 +1165,125 @@
(set_attr "mode" "SI")
(set_attr "length" "3,6")])

Expand All @@ -170,10 +170,6 @@ index 05ee7afcb..e0ae9d79a 100644
""
- "ssa8l\t%2\;srl\t%0, %1"
+{
+ fprintf (stderr, "[*xtensa_shift_3x @ %s()] 'a %s b*8'\n",
+ current_function_name (),
+ GET_CODE (operands[1]) == ASHIFT ? "<<" : ">>");
+
+ switch (GET_CODE (operands[1]))
+ {
+ case ASHIFT: return "ssa8b\t%3\;sll\t%0, %2";
Expand All @@ -194,10 +190,6 @@ index 05ee7afcb..e0ae9d79a 100644
+ (match_operand:SI 4 "const_int_operand" "i"))]))]
+ "(INTVAL (operands[4]) & 0x1f) == 0x18"
+{
+ fprintf (stderr, "[*xtensa_shift_3x_alt @ %s()] 'a %s (b*8&" HOST_WIDE_INT_PRINT_DEC ")'\n",
+ current_function_name (),
+ GET_CODE (operands[1]) == ASHIFT ? "<<" : ">>", INTVAL (operands[4]));
+
+ switch (GET_CODE (operands[1]))
+ {
+ case ASHIFT: return "ssa8b\t%3\;sll\t%0, %2";
Expand All @@ -218,10 +210,6 @@ index 05ee7afcb..e0ae9d79a 100644
+ (neg:SI (match_dup 2))])))]
+ "xtensa_shlrd_helper (operands) != UNKNOWN"
+{
+ fprintf (stderr, "[*xtensa_shlrd @ %s()] 'a %s c | b %s 32-c'\n",
+ current_function_name (),
+ GET_CODE (operands[4]) == ASHIFT ? "<<" : ">>", GET_CODE (operands[5]) == ASHIFT ? "<<" : ">>");
+
+ switch (xtensa_shlrd_helper (operands))
+ {
+ case ASHIFT: return "ssl\t%2\;src\t%0, %1, %3";
Expand All @@ -242,11 +230,6 @@ index 05ee7afcb..e0ae9d79a 100644
+ "xtensa_shlrd_helper (operands) != UNKNOWN
+ && INTVAL (operands[2]) + INTVAL (operands[6]) == 32"
+{
+ fprintf (stderr, "[*xtensa_shlrd_const @ %s()] 'a %s " HOST_WIDE_INT_PRINT_DEC " | b %s " HOST_WIDE_INT_PRINT_DEC "'\n",
+ current_function_name (),
+ GET_CODE (operands[4]) == ASHIFT ? "<<" : ">>", INTVAL (operands[2]),
+ GET_CODE (operands[5]) == ASHIFT ? "<<" : ">>", INTVAL (operands[6]));
+
+ switch (xtensa_shlrd_helper (operands))
+ {
+ case ASHIFT: return "ssai\t%L2\;src\t%0, %1, %3";
Expand All @@ -268,10 +251,6 @@ index 05ee7afcb..e0ae9d79a 100644
+ (const_int 3)))])))]
+ "xtensa_shlrd_helper (operands) != UNKNOWN"
+{
+ fprintf (stderr, "[*xtensa_shlrd_3x @ %s()] 'a %s (c*8) | b %s 32-(c*8)'\n",
+ current_function_name (),
+ GET_CODE (operands[4]) == ASHIFT ? "<<" : ">>", GET_CODE (operands[5]) == ASHIFT ? "<<" : ">>");
+
+ switch (xtensa_shlrd_helper (operands))
+ {
+ case ASHIFT: return "ssa8b\t%2\;src\t%0, %1, %3";
Expand All @@ -296,11 +275,6 @@ index 05ee7afcb..e0ae9d79a 100644
+ "xtensa_shlrd_helper (operands) != UNKNOWN
+ && (INTVAL (operands[6]) & 0x1f) == 0x18"
+{
+ fprintf (stderr, "[*xtensa_shlrd_3x_alt @ %s()] 'a %s (c*8&" HOST_WIDE_INT_PRINT_DEC ") | b %s 32-(c*8&" HOST_WIDE_INT_PRINT_DEC ")'\n",
+ current_function_name (),
+ GET_CODE (operands[4]) == ASHIFT ? "<<" : ">>", INTVAL (operands[6]),
+ GET_CODE (operands[5]) == ASHIFT ? "<<" : ">>", INTVAL (operands[6]));
+
+ switch (xtensa_shlrd_helper (operands))
+ {
+ case ASHIFT: return "ssa8b\t%2\;src\t%0, %1, %3";
Expand Down
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