gcc: xtensa: Backport patches from upstream/master (v3) #52
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List of patches added after earlephilhower#37: 461d3c84a0e5ad045ee54631901cc953d6befa20 "xtensa: fix PR target/108919" ce83c3e492c2fa5a08c15b5f4619d58f42a5dcd0 "xtensa: Make use of CLAMPS instruction if configured" c981f61c071757f1f724fe7c3959622c13f079fa "xtensa: Remove REG_OK_STRICT and its derivatives" 675b1a7f113adb1d737adaf78b4fd90be7a0ed1a "ifcvt.c: Prevent excessive if-conversion for conditional moves" e33d2dcb463161a110ac345a451132ce8b2b23d9 "xtensa: Optimize '(x & CST1_POW2) != 0 ? CST2_POW2 : 0'" 8a20b4bc50bdc8d61610974d60d5851f3fd8b70f "xtensa: Merge '*addx' and '*subx' insn patterns into one" bf78e24a90d4d064b0372a03c0327b6f90475949 "xtensa: tidy extzvsi-1bit patterns" 9b867c8281ee313cf6ec737d8f4a9ba7ef78408e "xtensa: Add 'subtraction from constant' insn pattern" 78648c09a0494e6bf1edbd97acb708bc282eb5f5 "xtensa: Rework 'setmemsi' insn pattern" feae4e83f76cf8e6698429d5acb08ff1968d13f2 "xtensa: Improve "*shlrd_reg" insn pattern and its variant" fe3ce0861081dd17e581c32b299b9c743d000470 "xtensa: Add 'adddi3' and 'subdi3' insn patterns" 830d36b3c307c70af57b832821d8590b29a5bda5 "xtensa: Optimize boolean evaluation or branching when EQ/NE to INT_MIN" 1ce54ad8cd694a1defb9374f18607194ef702ea7 "xtensa: Remove TARGET_MEMORY_MOVE_COST hook" 7360cba833cd921631818428a851e03ea88f1e8a "xtensa: constantsynth: Add new 2-insns synthesis pattern" 0778f4dcdafa7dabb015a3375089addc1a4df49b "xtensa: Fix missing mode warning in "*eqne_INT_MIN"" 2f615b33dd61590a74e7758e19016250ade2b828 "xtensa: The use of CLAMPS instruction also requires TARGET_MINMAX, as well as TARGET_CLAMPS" cd22b97726472138d3fe22fb1ff0c27176408fc9 "xtensa: Use HARD_REG_SET instead of bare integer" a4829dda6362f5f653c4bd5783374fafc0e8622f "xtensa: Optimize boolean evaluation when SImode EQ/NE to zero if TARGET_MINMAX" 1d17d58c284fa8c30a42195dadd14a44606c987e "xtensa: Optimize several boolean evaluations of EQ/NE against constant zero" fd948fd846c7de29150872e43b63bf9128da5b8f "xtensa: use salt/saltu in xtensa_expand_scc" cc7aca846ae524f36a350cd54cd31da22acd6805 "xtensa: fix salt/saltu version check" 3f722e7886ff46385033d9187e21f49c523083d4 "xtensa: Fix missing mode warning in "*eqne_zero_masked_bits"" 24d5e0bf19f27a89a13f64b4b8750dbde89bdaa0 "xtensa: Make full transition to LRA" 7c2c7dd24bd93cd9cb8a6e54a4d11850982665fd "xtensa: Recover constant synthesis for HImode after LRA transition" bc5a9dab55d13f888a3cdd150c8cf5c2244f35e0 "xtensa: reorder movsi_internal patterns for better code generation during LRA"
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See #29, #36 and #37.
List of patches added after #37:
461d3c84a0e5ad045ee54631901cc953d6befa20 "xtensa: fix PR target/108919"
ce83c3e492c2fa5a08c15b5f4619d58f42a5dcd0 "xtensa: Make use of CLAMPS instruction if configured"
c981f61c071757f1f724fe7c3959622c13f079fa "xtensa: Remove REG_OK_STRICT and its derivatives"
675b1a7f113adb1d737adaf78b4fd90be7a0ed1a "ifcvt.c: Prevent excessive if-conversion for conditional moves"
e33d2dcb463161a110ac345a451132ce8b2b23d9 "xtensa: Optimize '(x & CST1_POW2) != 0 ? CST2_POW2 : 0'"
8a20b4bc50bdc8d61610974d60d5851f3fd8b70f "xtensa: Merge '*addx' and '*subx' insn patterns into one"
bf78e24a90d4d064b0372a03c0327b6f90475949 "xtensa: tidy extzvsi-1bit patterns"
9b867c8281ee313cf6ec737d8f4a9ba7ef78408e "xtensa: Add 'subtraction from constant' insn pattern"
78648c09a0494e6bf1edbd97acb708bc282eb5f5 "xtensa: Rework 'setmemsi' insn pattern"
feae4e83f76cf8e6698429d5acb08ff1968d13f2 "xtensa: Improve "*shlrd_reg" insn pattern and its variant"
fe3ce0861081dd17e581c32b299b9c743d000470 "xtensa: Add 'adddi3' and 'subdi3' insn patterns"
830d36b3c307c70af57b832821d8590b29a5bda5 "xtensa: Optimize boolean evaluation or branching when EQ/NE to INT_MIN"
1ce54ad8cd694a1defb9374f18607194ef702ea7 "xtensa: Remove TARGET_MEMORY_MOVE_COST hook"
7360cba833cd921631818428a851e03ea88f1e8a "xtensa: constantsynth: Add new 2-insns synthesis pattern"
0778f4dcdafa7dabb015a3375089addc1a4df49b "xtensa: Fix missing mode warning in "*eqne_INT_MIN""
2f615b33dd61590a74e7758e19016250ade2b828 "xtensa: The use of CLAMPS instruction also requires TARGET_MINMAX, as well as TARGET_CLAMPS"
cd22b97726472138d3fe22fb1ff0c27176408fc9 "xtensa: Use HARD_REG_SET instead of bare integer"
a4829dda6362f5f653c4bd5783374fafc0e8622f "xtensa: Optimize boolean evaluation when SImode EQ/NE to zero if TARGET_MINMAX"
1d17d58c284fa8c30a42195dadd14a44606c987e "xtensa: Optimize several boolean evaluations of EQ/NE against constant zero"
fd948fd846c7de29150872e43b63bf9128da5b8f "xtensa: use salt/saltu in xtensa_expand_scc"
cc7aca846ae524f36a350cd54cd31da22acd6805 "xtensa: fix salt/saltu version check"
3f722e7886ff46385033d9187e21f49c523083d4 "xtensa: Fix missing mode warning in "*eqne_zero_masked_bits""
24d5e0bf19f27a89a13f64b4b8750dbde89bdaa0 "xtensa: Make full transition to LRA"
7c2c7dd24bd93cd9cb8a6e54a4d11850982665fd "xtensa: Recover constant synthesis for HImode after LRA transition"
bc5a9dab55d13f888a3cdd150c8cf5c2244f35e0 "xtensa: reorder movsi_internal patterns for better code generation during LRA"