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Investigate use of vector sequence for fselect #5002
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sarwat12
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Previously vector instructions were not produced for handling floats alongside double data types within the select evaluator. This PR addresses the use of vector instructions for both data types by: - Use of LLGFR instruction for doubles for zero-extending a 32 bit conditionReg to 64 bits - Use of separate SLLG instruction for floats to preserve the float representation of the first 32 bits as it is later moved into FPR - Addition of mask values in the VFCE instruction to get the element size mask for floats and doubles respectively Closes: eclipse#5002 Signed-off-by: Sarwat Shaheen [email protected]
sarwat12
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This PR addresses the use of vector instructions to handle short format floats in the **fselect** evaluator on z14 and newer platforms, by taking advantage of the long format in vector instructions already supported for the **dselect** evaluator. - Use of LLGFR instruction for doubles for zero-extending a 32 bit conditionReg to 64 bits - Use of separate SLLG instruction for floats to preserve the float representation of the first 32 bits as it is later moved into FPR - Addition of mask values in the VFCE instruction to get the element size mask for floats and doubles respectively Closes: eclipse#5002 Signed-off-by: Sarwat Shaheen [email protected]
sarwat12
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Nov 6, 2023
This commit addresses the use of vector instructions to handle short format floats in the **select** evaluator. Previously, the use of vector instructions for short format in the select evaluator was disabled, even though on z14 and newer platforms it is supported. The issue was caused by not correctly converting the condition code from GPR to FPR for short format. Changes for enabling vector instructions for short format: - Use of LLGFR instruction for long format doubles for zero-extending a 32 bit conditionReg to 64 bits - Use of separate SLLG instruction for short format floats to preserve the float representation of the first 32 bits as it is later moved into FPR - Addition of mask values in the VFCE instruction to get the element size mask for floats and doubles respectively Closes: eclipse#5002 Signed-off-by: Sarwat Shaheen [email protected]
sarwat12
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Nov 6, 2023
This commit addresses the use of vector instructions to handle short format in the **select** evaluator. Previously, the use of vector instructions for short format in the select evaluator was disabled, even though on z14 and newer platforms, it is supported. The issue was caused by not correctly converting the condition code from GPR to FPR for short format. Changes for enabling vector instructions for short format: - Use of LLGFR instruction for long format for zero-extending a 32 bit conditionReg to 64 bits - Use of separate SLLG instruction for short format floats to preserve the float representation of the first 32 bits as it is later moved into FPR - Addition of mask values in the VFCE instruction to get the element size mask for floats and doubles respectively Closes: eclipse#5002 Signed-off-by: Sarwat Shaheen [email protected]
sarwat12
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Nov 6, 2023
This commit addresses the use of vector instructions to handle short format in the **select** evaluator. Previously, the use of vector instructions for short format in the select evaluator was disabled, even though on z14 and newer platforms, it is supported. The issue was caused by not correctly converting the condition code from GPR to FPR for short format. Changes for enabling vector instructions for short format: - Use of LLGFR instruction for long format for zero-extending a 32 bit conditionReg to 64 bits - Use of separate SLLG instruction for short format floats to preserve the float representation of the first 32 bits as it is later moved into FPR - Addition of mask values in the VFCE instruction to get the element size mask for floats and doubles respectively Closes: eclipse#5002 Signed-off-by: Sarwat Shaheen [email protected]
sarwat12
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Nov 7, 2023
This commit addresses the use of vector instructions to handle short format in the **select** evaluator. Previously, the use of vector instructions for short format in the select evaluator was disabled, even though on z14 and newer platforms, it is supported. The issue was caused by not correctly converting the condition code from GPR to FPR for short format. Changes for enabling vector instructions for short format: - Use of LLGFR instruction for long format for zero-extending a 32 bit conditionReg to 64 bits - Use of separate SLLG instruction for short format floats to preserve the float representation of the first 32 bits as it is later moved into FPR - Addition of mask values in the VFCE instruction to get the element size mask for floats and doubles respectively Closes: eclipse#5002 Signed-off-by: Sarwat Shaheen [email protected]
sarwat12
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Nov 23, 2023
This commit addresses the use of vector instructions to handle short format in the **select** evaluator. Previously, the use of vector instructions for short format in the select evaluator was disabled, even though on z14 and newer platforms, it is supported. The issue was caused by not correctly converting the condition code from GPR to FPR for short format. Changes for enabling vector instructions for short format: - Use of LLGFR instruction for long format for zero-extending a 32 bit conditionReg to 64 bits - Use of separate SLLG instruction for short format floats to preserve the float representation of the first 32 bits as it is later moved into FPR - Addition of mask values in the VFCE instruction to get the element size mask for floats and doubles respectively Closes: eclipse#5002 Signed-off-by: Sarwat Shaheen [email protected]
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Over in #4996 there was a review comment made [1] about the potential of using the vector sequence to handle float data types as well. It seems some issues were encountered when this was first attempted which we need to further investigate. We should try to enable vector support for floats in the
dselectEvaluator
as well.[1] #4996 (comment)
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