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WIP: Rename codeGen to cg #5661

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WIP: Rename codeGen to cg #5661

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30 changes: 15 additions & 15 deletions compiler/aarch64/codegen/ARM64SystemLinkage.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -501,18 +501,18 @@ TR::ARM64SystemLinkage::createPrologue(TR::Instruction *cursor)
void
TR::ARM64SystemLinkage::createPrologue(TR::Instruction *cursor, List<TR::ParameterSymbol> &parmList)
{
TR::CodeGenerator *codeGen = cg();
TR::Machine *machine = codeGen->machine();
TR::CodeGenerator *cg = this->cg();
TR::Machine *machine = cg->machine();
TR::ResolvedMethodSymbol *bodySymbol = comp()->getJittedMethodSymbol();
const TR::ARM64LinkageProperties& properties = getProperties();
TR::RealRegister *sp = machine->getRealRegister(properties.getStackPointerRegister());
TR::Node *firstNode = comp()->getStartTree()->getNode();

// allocate stack space
uint32_t frameSize = (uint32_t)codeGen->getFrameSizeInBytes();
uint32_t frameSize = (uint32_t)cg->getFrameSizeInBytes();
if (constantIsUnsignedImm12(frameSize))
{
cursor = generateTrg1Src1ImmInstruction(codeGen, TR::InstOpCode::subimmx, firstNode, sp, sp, frameSize, cursor);
cursor = generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::subimmx, firstNode, sp, sp, frameSize, cursor);
}
else
{
Expand All @@ -522,7 +522,7 @@ TR::ARM64SystemLinkage::createPrologue(TR::Instruction *cursor, List<TR::Paramet
// save link register (x30)
if (machine->getLinkRegisterKilled())
{
TR::MemoryReference *stackSlot = new (trHeapMemory()) TR::MemoryReference(sp, 0, codeGen);
TR::MemoryReference *stackSlot = new (trHeapMemory()) TR::MemoryReference(sp, 0, cg);
cursor = generateMemSrc1Instruction(cg(), TR::InstOpCode::strimmx, firstNode, stackSlot, machine->getRealRegister(TR::RealRegister::x30), cursor);
}

Expand All @@ -533,7 +533,7 @@ TR::ARM64SystemLinkage::createPrologue(TR::Instruction *cursor, List<TR::Paramet
TR::RealRegister *rr = machine->getRealRegister((TR::RealRegister::RegNum)r);
if (rr->getHasBeenAssignedInMethod())
{
TR::MemoryReference *stackSlot = new (trHeapMemory()) TR::MemoryReference(sp, offset, codeGen);
TR::MemoryReference *stackSlot = new (trHeapMemory()) TR::MemoryReference(sp, offset, cg);
cursor = generateMemSrc1Instruction(cg(), TR::InstOpCode::strimmx, firstNode, stackSlot, rr, cursor);
offset += 8;
}
Expand All @@ -543,7 +543,7 @@ TR::ARM64SystemLinkage::createPrologue(TR::Instruction *cursor, List<TR::Paramet
TR::RealRegister *rr = machine->getRealRegister((TR::RealRegister::RegNum)r);
if (rr->getHasBeenAssignedInMethod())
{
TR::MemoryReference *stackSlot = new (trHeapMemory()) TR::MemoryReference(sp, offset, codeGen);
TR::MemoryReference *stackSlot = new (trHeapMemory()) TR::MemoryReference(sp, offset, cg);
cursor = generateMemSrc1Instruction(cg(), TR::InstOpCode::vstrimmd, firstNode, stackSlot, rr, cursor);
offset += 8;
}
Expand All @@ -555,9 +555,9 @@ TR::ARM64SystemLinkage::createPrologue(TR::Instruction *cursor, List<TR::Paramet
void
TR::ARM64SystemLinkage::createEpilogue(TR::Instruction *cursor)
{
TR::CodeGenerator *codeGen = cg();
TR::CodeGenerator *cg = this->cg();
const TR::ARM64LinkageProperties& properties = getProperties();
TR::Machine *machine = codeGen->machine();
TR::Machine *machine = cg->machine();
TR::Node *lastNode = cursor->getNode();
TR::ResolvedMethodSymbol *bodySymbol = comp()->getJittedMethodSymbol();
TR::RealRegister *sp = machine->getRealRegister(properties.getStackPointerRegister());
Expand All @@ -569,7 +569,7 @@ TR::ARM64SystemLinkage::createEpilogue(TR::Instruction *cursor)
TR::RealRegister *rr = machine->getRealRegister((TR::RealRegister::RegNum)r);
if (rr->getHasBeenAssignedInMethod())
{
TR::MemoryReference *stackSlot = new (trHeapMemory()) TR::MemoryReference(sp, offset, codeGen);
TR::MemoryReference *stackSlot = new (trHeapMemory()) TR::MemoryReference(sp, offset, cg);
cursor = generateTrg1MemInstruction(cg(), TR::InstOpCode::ldrimmx, lastNode, rr, stackSlot, cursor);
offset += 8;
}
Expand All @@ -579,7 +579,7 @@ TR::ARM64SystemLinkage::createEpilogue(TR::Instruction *cursor)
TR::RealRegister *rr = machine->getRealRegister((TR::RealRegister::RegNum)r);
if (rr->getHasBeenAssignedInMethod())
{
TR::MemoryReference *stackSlot = new (trHeapMemory()) TR::MemoryReference(sp, offset, codeGen);
TR::MemoryReference *stackSlot = new (trHeapMemory()) TR::MemoryReference(sp, offset, cg);
cursor = generateTrg1MemInstruction(cg(), TR::InstOpCode::vldrimmd, lastNode, rr, stackSlot, cursor);
offset += 8;
}
Expand All @@ -589,23 +589,23 @@ TR::ARM64SystemLinkage::createEpilogue(TR::Instruction *cursor)
TR::RealRegister *lr = machine->getRealRegister(TR::RealRegister::lr);
if (machine->getLinkRegisterKilled())
{
TR::MemoryReference *stackSlot = new (trHeapMemory()) TR::MemoryReference(sp, 0, codeGen);
TR::MemoryReference *stackSlot = new (trHeapMemory()) TR::MemoryReference(sp, 0, cg);
cursor = generateTrg1MemInstruction(cg(), TR::InstOpCode::ldrimmx, lastNode, lr, stackSlot, cursor);
}

// remove space for preserved registers
uint32_t frameSize = codeGen->getFrameSizeInBytes();
uint32_t frameSize = cg->getFrameSizeInBytes();
if (constantIsUnsignedImm12(frameSize))
{
cursor = generateTrg1Src1ImmInstruction(codeGen, TR::InstOpCode::addimmx, lastNode, sp, sp, frameSize, cursor);
cursor = generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::addimmx, lastNode, sp, sp, frameSize, cursor);
}
else
{
TR_UNIMPLEMENTED();
}

// return
cursor = generateRegBranchInstruction(codeGen, TR::InstOpCode::ret, lastNode, lr, cursor);
cursor = generateRegBranchInstruction(cg, TR::InstOpCode::ret, lastNode, lr, cursor);
}


Expand Down
30 changes: 15 additions & 15 deletions compiler/arm/codegen/ARMSystemLinkage.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -456,9 +456,9 @@ TR::ARMLinkageProperties& TR::ARMSystemLinkage::getProperties()

void TR::ARMSystemLinkage::createPrologue(TR::Instruction *cursor)
{
TR::CodeGenerator *codeGen = cg();
TR::CodeGenerator *cg = this->cg();
const TR::ARMLinkageProperties& properties = getProperties();
TR::Machine *machine = codeGen->machine();
TR::Machine *machine = cg->machine();
TR::ResolvedMethodSymbol* bodySymbol = comp()->getJittedMethodSymbol();
TR::Node *firstNode = comp()->getStartTree()->getNode();
TR::RealRegister *stackPtr = machine->getRealRegister(properties.getStackPointerRegister());
Expand All @@ -471,8 +471,8 @@ void TR::ARMSystemLinkage::createPrologue(TR::Instruction *cursor)
}

// allocate stack space
auto frameSize = codeGen->getFrameSizeInBytes();
cursor = generateTrg1Src1ImmInstruction(codeGen, ARMOp_sub, firstNode, stackPtr, stackPtr, frameSize, 0, cursor);
auto frameSize = cg->getFrameSizeInBytes();
cursor = generateTrg1Src1ImmInstruction(cg, ARMOp_sub, firstNode, stackPtr, stackPtr, frameSize, 0, cursor);

// spill argument registers
auto nextIntArgReg = 0;
Expand All @@ -482,7 +482,7 @@ void TR::ARMSystemLinkage::createPrologue(TR::Instruction *cursor)
parameter!=NULL && (nextIntArgReg < getProperties().getNumIntArgRegs() || nextFltArgReg < getProperties().getNumFloatArgRegs());
parameter=parameterIterator.getNext())
{
auto *stackSlot = new (trHeapMemory()) TR::MemoryReference(stackPtr, parameter->getParameterOffset(), codeGen);
auto *stackSlot = new (trHeapMemory()) TR::MemoryReference(stackPtr, parameter->getParameterOffset(), cg);
switch (parameter->getDataType())
{
case TR::Int8:
Expand All @@ -504,7 +504,7 @@ void TR::ARMSystemLinkage::createPrologue(TR::Instruction *cursor)
if (nextIntArgReg + 1 < getProperties().getNumIntArgRegs())
{
cursor = generateMemSrc1Instruction(cg(), ARMOp_str, firstNode, stackSlot, machine->getRealRegister((TR::RealRegister::RegNum)(TR::RealRegister::gr0 + nextIntArgReg)), cursor);
stackSlot = new (trHeapMemory()) TR::MemoryReference(stackPtr, parameter->getParameterOffset() + 4, codeGen);
stackSlot = new (trHeapMemory()) TR::MemoryReference(stackPtr, parameter->getParameterOffset() + 4, cg);
cursor = generateMemSrc1Instruction(cg(), ARMOp_str, firstNode, stackSlot, machine->getRealRegister((TR::RealRegister::RegNum)(TR::RealRegister::gr0 + nextIntArgReg + 1)), cursor);
nextIntArgReg += 2;
}
Expand Down Expand Up @@ -535,43 +535,43 @@ void TR::ARMSystemLinkage::createPrologue(TR::Instruction *cursor)
// save all preserved registers
for (int r = TR::RealRegister::gr4; r <= TR::RealRegister::gr11; ++r)
{
auto *stackSlot = new (trHeapMemory()) TR::MemoryReference(stackPtr, (TR::RealRegister::gr11 - r + 1)*4 + bodySymbol->getLocalMappingCursor(), codeGen);
auto *stackSlot = new (trHeapMemory()) TR::MemoryReference(stackPtr, (TR::RealRegister::gr11 - r + 1)*4 + bodySymbol->getLocalMappingCursor(), cg);
cursor = generateMemSrc1Instruction(cg(), ARMOp_str, firstNode, stackSlot, machine->getRealRegister((TR::RealRegister::RegNum)r), cursor);
}

// save link register (r14)
auto *stackSlot = new (trHeapMemory()) TR::MemoryReference(stackPtr, bodySymbol->getLocalMappingCursor(), codeGen);
auto *stackSlot = new (trHeapMemory()) TR::MemoryReference(stackPtr, bodySymbol->getLocalMappingCursor(), cg);
cursor = generateMemSrc1Instruction(cg(), ARMOp_str, firstNode, stackSlot, machine->getRealRegister(TR::RealRegister::gr14), cursor);
}

void TR::ARMSystemLinkage::createEpilogue(TR::Instruction *cursor)
{
TR::CodeGenerator *codeGen = cg();
TR::CodeGenerator *cg = this->cg();
const TR::ARMLinkageProperties& properties = getProperties();
TR::Machine *machine = codeGen->machine();
TR::Machine *machine = cg->machine();
TR::Node *lastNode = cursor->getNode();
TR::ResolvedMethodSymbol* bodySymbol = comp()->getJittedMethodSymbol();
TR::RealRegister *stackPtr = machine->getRealRegister(properties.getStackPointerRegister());

// restore link register (r14)
auto *stackSlot = new (trHeapMemory()) TR::MemoryReference(stackPtr, bodySymbol->getLocalMappingCursor(), codeGen);
auto *stackSlot = new (trHeapMemory()) TR::MemoryReference(stackPtr, bodySymbol->getLocalMappingCursor(), cg);
cursor = generateMemSrc1Instruction(cg(), ARMOp_ldr, lastNode, stackSlot, machine->getRealRegister(TR::RealRegister::gr14), cursor);

// restore all preserved registers
for (int r = TR::RealRegister::gr4; r <= TR::RealRegister::gr11; ++r)
{
auto *stackSlot = new (trHeapMemory()) TR::MemoryReference(stackPtr, (TR::RealRegister::gr11 - r + 1)*4 + bodySymbol->getLocalMappingCursor(), codeGen);
auto *stackSlot = new (trHeapMemory()) TR::MemoryReference(stackPtr, (TR::RealRegister::gr11 - r + 1)*4 + bodySymbol->getLocalMappingCursor(), cg);
cursor = generateMemSrc1Instruction(cg(), ARMOp_ldr, lastNode, stackSlot, machine->getRealRegister((TR::RealRegister::RegNum)r), cursor);
}

// remove space for preserved registers
auto frameSize = codeGen->getFrameSizeInBytes();
cursor = generateTrg1Src1ImmInstruction(codeGen, ARMOp_add, lastNode, stackPtr, stackPtr, frameSize, 0, cursor);
auto frameSize = cg->getFrameSizeInBytes();
cursor = generateTrg1Src1ImmInstruction(cg, ARMOp_add, lastNode, stackPtr, stackPtr, frameSize, 0, cursor);

// return using `mov r15, r14`
TR::RealRegister *gr14 = machine->getRealRegister(TR::RealRegister::gr14);
TR::RealRegister *gr15 = machine->getRealRegister(TR::RealRegister::gr15);
cursor = generateTrg1Src1Instruction(codeGen, ARMOp_mov, lastNode, gr15, gr14, cursor);
cursor = generateTrg1Src1Instruction(cg, ARMOp_mov, lastNode, gr15, gr14, cursor);
}

TR::MemoryReference *TR::ARMSystemLinkage::getOutgoingArgumentMemRef(int32_t totalSize,
Expand Down
2 changes: 1 addition & 1 deletion compiler/arm/codegen/ARMSystemLinkage.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -43,7 +43,7 @@ class ARMSystemLinkage : public TR::Linkage

public:

ARMSystemLinkage(TR::CodeGenerator *codeGen);
ARMSystemLinkage(TR::CodeGenerator *cg);

virtual uint32_t getRightToLeft();
virtual void mapStack(TR::ResolvedMethodSymbol *method);
Expand Down
2 changes: 1 addition & 1 deletion compiler/arm/codegen/OMRCodeGenerator.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -47,7 +47,7 @@ namespace TR { class Register; }
extern TR::Instruction *armLoadConstant(TR::Node *node,
int32_t value,
TR::Register *targetRegister,
TR::CodeGenerator *codeGen,
TR::CodeGenerator *cg,
TR::Instruction *cursor=NULL);

extern TR::Instruction *loadAddressConstantInSnippet(TR::CodeGenerator *cg,
Expand Down
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