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AArch64: Add byte and short arithmetic opcode evaluators #6780

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Oct 20, 2022
Merged

AArch64: Add byte and short arithmetic opcode evaluators #6780

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34 changes: 34 additions & 0 deletions compiler/aarch64/codegen/BinaryEvaluator.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1335,6 +1335,40 @@ OMR::ARM64::TreeEvaluator::lmulhEvaluator(TR::Node *node, TR::CodeGenerator *cg)
return trgReg;
}

static TR::Register* subInt32DivEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
TR::Node *firstChild = node->getFirstChild();
TR::Register *src1Reg = cg->evaluate(firstChild);
TR::Node *secondChild = node->getSecondChild();
TR::Register *src2Reg = cg->evaluate(secondChild);
TR::Register *tmpReg = cg->allocateRegister();
TR::Register *trgReg = cg->allocateRegister();
const uint32_t operandBits = TR::DataType::getSize(node->getDataType()) * 8;

generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::sbfmw, node, trgReg, src1Reg, operandBits - 1); // sxtb or sxth
generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::sbfmw, node, tmpReg, src2Reg, operandBits - 1); // sxtb or sxth

generateTrg1Src2Instruction(cg, TR::InstOpCode::sdivw, node, trgReg, trgReg, tmpReg);

cg->stopUsingRegister(tmpReg);
node->setRegister(trgReg);
cg->decReferenceCount(firstChild);
cg->decReferenceCount(secondChild);
return trgReg;
}

TR::Register*
OMR::ARM64::TreeEvaluator::bdivEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return subInt32DivEvaluator(node, cg);
}

TR::Register*
OMR::ARM64::TreeEvaluator::sdivEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return subInt32DivEvaluator(node, cg);
}

TR::Register *
OMR::ARM64::TreeEvaluator::idivEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
Expand Down
20 changes: 4 additions & 16 deletions compiler/aarch64/codegen/OMRTreeEvaluator.cpp
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Expand Up @@ -266,13 +266,13 @@ OMR::ARM64::TreeEvaluator::callEvaluator(TR::Node *node, TR::CodeGenerator *cg)
TR::Register*
OMR::ARM64::TreeEvaluator::baddEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return TR::TreeEvaluator::unImpOpEvaluator(node, cg);
return TR::TreeEvaluator::iaddEvaluator(node, cg);
}

TR::Register*
OMR::ARM64::TreeEvaluator::saddEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return TR::TreeEvaluator::unImpOpEvaluator(node, cg);
return TR::TreeEvaluator::iaddEvaluator(node, cg);
}

TR::Register*
Expand All @@ -296,25 +296,13 @@ OMR::ARM64::TreeEvaluator::asubEvaluator(TR::Node *node, TR::CodeGenerator *cg)
TR::Register*
OMR::ARM64::TreeEvaluator::bmulEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return TR::TreeEvaluator::unImpOpEvaluator(node, cg);
return TR::TreeEvaluator::imulEvaluator(node, cg);
}

TR::Register*
OMR::ARM64::TreeEvaluator::smulEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return TR::TreeEvaluator::unImpOpEvaluator(node, cg);
}

TR::Register*
OMR::ARM64::TreeEvaluator::bdivEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return TR::TreeEvaluator::unImpOpEvaluator(node, cg);
}

TR::Register*
OMR::ARM64::TreeEvaluator::sdivEvaluator(TR::Node *node, TR::CodeGenerator *cg)
{
return TR::TreeEvaluator::unImpOpEvaluator(node, cg);
return TR::TreeEvaluator::imulEvaluator(node, cg);
}

TR::Register*
Expand Down
26 changes: 1 addition & 25 deletions fvtest/compilertriltest/ArithmeticTest.cpp
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*******************************************************************************
* Copyright (c) 2017, 2021 IBM Corp. and others
* Copyright (c) 2017, 2022 IBM Corp. and others
*
* This program and the accompanying materials are made available under
* the terms of the Eclipse Public License 2.0 which accompanies this
Expand Down Expand Up @@ -169,8 +169,6 @@ TEST_P(UInt32Arithmetic, UsingConst) {
std::string arch = omrsysinfo_get_CPU_architecture();
SKIP_IF((param.opcode == "iudiv" || param.opcode == "iurem") && (OMRPORT_ARCH_PPC64 == arch || OMRPORT_ARCH_PPC64LE == arch), MissingImplementation)
<< "The Power codegen does not yet support iudiv/iurem (see issue #3673)";
SKIP_IF((param.opcode == "iudiv" || param.opcode == "iurem") && OMRPORT_ARCH_AARCH64 == arch, MissingImplementation)
<< "The AArch64 codegen does not yet support iudiv/iurem (see issue #5891)";

char inputTrees[1024] = {0};
std::snprintf(inputTrees, sizeof(inputTrees),
Expand Down Expand Up @@ -204,8 +202,6 @@ TEST_P(UInt32Arithmetic, UsingLoadParam) {
std::string arch = omrsysinfo_get_CPU_architecture();
SKIP_IF((param.opcode == "iudiv" || param.opcode == "iurem") && (OMRPORT_ARCH_PPC64 == arch || OMRPORT_ARCH_PPC64LE == arch), MissingImplementation)
<< "The Power codegen does not yet support iudiv/iurem (see issue #3673)";
SKIP_IF((param.opcode == "iudiv" || param.opcode == "iurem") && OMRPORT_ARCH_AARCH64 == arch, MissingImplementation)
<< "The AArch64 codegen does not yet support iudiv/iurem (see issue #5891)";

char inputTrees[1024] = {0};
std::snprintf(inputTrees, sizeof(inputTrees),
Expand Down Expand Up @@ -235,8 +231,6 @@ TEST_P(UInt32Arithmetic, UsingLoadParamAndLoadConst) {
std::string arch = omrsysinfo_get_CPU_architecture();
SKIP_IF((param.opcode == "iudiv" || param.opcode == "iurem") && (OMRPORT_ARCH_PPC64 == arch || OMRPORT_ARCH_PPC64LE == arch), MissingImplementation)
<< "The Power codegen does not yet support iudiv/iurem (see issue #3673)";
SKIP_IF((param.opcode == "iudiv" || param.opcode == "iurem") && OMRPORT_ARCH_AARCH64 == arch, MissingImplementation)
<< "The AArch64 codegen does not yet support iudiv/iurem (see issue #5891)";

char inputTrees[1024] = {0};
std::snprintf(inputTrees, sizeof(inputTrees),
Expand Down Expand Up @@ -347,8 +341,6 @@ TEST_P(UInt64Arithmetic, UsingConst) {
std::string arch = omrsysinfo_get_CPU_architecture();
SKIP_IF(param.opcode == "ludiv" && (OMRPORT_ARCH_PPC64 == arch || OMRPORT_ARCH_PPC64LE == arch), MissingImplementation)
<< "The Power codegen does not yet support ludiv (see issue #2227)";
SKIP_IF(param.opcode == "ludiv" && OMRPORT_ARCH_AARCH64 == arch, MissingImplementation)
<< "The AArch64 codegen does not yet support ludiv (see issue #5891)";

char inputTrees[1024] = {0};
std::snprintf(inputTrees, sizeof(inputTrees),
Expand Down Expand Up @@ -382,8 +374,6 @@ TEST_P(UInt64Arithmetic, UsingLoadParam) {
std::string arch = omrsysinfo_get_CPU_architecture();
SKIP_IF(param.opcode == "ludiv" && (OMRPORT_ARCH_PPC64 == arch || OMRPORT_ARCH_PPC64LE == arch), MissingImplementation)
<< "The Power codegen does not yet support ludiv (see issue #2227)";
SKIP_IF(param.opcode == "ludiv" && OMRPORT_ARCH_AARCH64 == arch, MissingImplementation)
<< "The AArch64 codegen does not yet support ludiv (see issue #5891)";

char inputTrees[1024] = {0};
std::snprintf(inputTrees, sizeof(inputTrees),
Expand Down Expand Up @@ -413,8 +403,6 @@ TEST_P(UInt64Arithmetic, UsingLoadParamAndLoadConst) {
std::string arch = omrsysinfo_get_CPU_architecture();
SKIP_IF(param.opcode == "ludiv" && (OMRPORT_ARCH_PPC64 == arch || OMRPORT_ARCH_PPC64LE == arch), MissingImplementation)
<< "The Power codegen does not yet support ludiv (see issue #2227)";
SKIP_IF(param.opcode == "ludiv" && OMRPORT_ARCH_AARCH64 == arch, MissingImplementation)
<< "The AArch64 codegen does not yet support ludiv (see issue #5891)";

char inputTrees[1024] = {0};
std::snprintf(inputTrees, sizeof(inputTrees),
Expand Down Expand Up @@ -442,8 +430,6 @@ TEST_P(UInt64Arithmetic, UsingLoadParamAndLoadConst) {
TEST_P(Int16Arithmetic, UsingConst) {
auto param = TRTest::to_struct(GetParam());

SKIP_ON_AARCH64(MissingImplementation) << "The AArch64 codegen does not yet support sadd/ssub/smul (see issue #5891)";

char inputTrees[1024] = {0};
std::snprintf(inputTrees, sizeof(inputTrees),
"(method return=Int16"
Expand Down Expand Up @@ -473,8 +459,6 @@ TEST_P(Int16Arithmetic, UsingConst) {
TEST_P(Int16Arithmetic, UsingLoadParam) {
auto param = TRTest::to_struct(GetParam());

SKIP_ON_AARCH64(MissingImplementation) << "The AArch64 codegen does not yet support sadd/ssub/smul (see issue #5891)";

char inputTrees[1024] = {0};
std::snprintf(inputTrees, sizeof(inputTrees),
"(method return=Int16 args=[Int16, Int16]"
Expand All @@ -500,8 +484,6 @@ TEST_P(Int16Arithmetic, UsingLoadParam) {
TEST_P(Int16Arithmetic, UsingLoadParamAndLoadConst) {
auto param = TRTest::to_struct(GetParam());

SKIP_ON_AARCH64(MissingImplementation) << "The AArch64 codegen does not yet support sadd/ssub/smul (see issue #5891)";

char inputTrees[1024] = {0};
std::snprintf(inputTrees, sizeof(inputTrees),
"(method return=Int16 args=[Int16]"
Expand All @@ -528,8 +510,6 @@ TEST_P(Int16Arithmetic, UsingLoadParamAndLoadConst) {
TEST_P(Int8Arithmetic, UsingConst) {
auto param = TRTest::to_struct(GetParam());

SKIP_ON_AARCH64(MissingImplementation) << "The AArch64 codegen does not yet support badd/bsub/bmul (see issue #5891)";

char inputTrees[1024] = {0};
std::snprintf(inputTrees, sizeof(inputTrees),
"(method return=Int8"
Expand Down Expand Up @@ -559,8 +539,6 @@ TEST_P(Int8Arithmetic, UsingConst) {
TEST_P(Int8Arithmetic, UsingLoadParam) {
auto param = TRTest::to_struct(GetParam());

SKIP_ON_AARCH64(MissingImplementation) << "The AArch64 codegen does not yet support badd/bsub/bmul (see issue #5891)";

char inputTrees[1024] = {0};
std::snprintf(inputTrees, sizeof(inputTrees),
"(method return=Int8 args=[Int8, Int8]"
Expand All @@ -586,8 +564,6 @@ TEST_P(Int8Arithmetic, UsingLoadParam) {
TEST_P(Int8Arithmetic, UsingLoadParamAndLoadConst) {
auto param = TRTest::to_struct(GetParam());

SKIP_ON_AARCH64(MissingImplementation) << "The AArch64 codegen does not yet support badd/bsub/bmul (see issue #5891)";

char inputTrees[1024] = {0};
std::snprintf(inputTrees, sizeof(inputTrees),
"(method return=Int8 args=[Int8]"
Expand Down