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rev 1 errata #1
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Crystal oscillator frequency, do not use 48MHz, must be 33.33MHz. |
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Correct value is 50 MHz. |
@gkasprow could you please explain following:
Transistors (CSD17308Q3 ) are already changed.
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Where should I add caps? |
All clock rails in the banks supplied from 1V2 |
they are clocked from 1V8 and common mode is far above 0.6V which is required by diff SSTL12 |
ok, I haven't seen two clocks in SDRAM banks. |
Can you open dedicated issues if you have some doubts? Otherwize we will miss important things. |
ok |
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