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frontend/etherbone: Enable TX/RX buffer on UDP Port when requesting i… ci #373: Commit d5ba0d2 pushed by enjoy-digital
April 4, 2024 11:18 10m 1s master
master
April 4, 2024 11:18 10m 1s
phy/a7_gtp: Allow using GTGREFCLK0/1 input as reference clocks. ci #372: Commit 3c1f4db pushed by enjoy-digital
April 4, 2024 08:50 10m 37s master
master
April 4, 2024 08:50 10m 37s
Merge pull request #158 from enjoy-digital/crc_cleanup ci #371: Commit c1dc020 pushed by enjoy-digital
March 26, 2024 11:41 9m 50s master
master
March 26, 2024 11:41 9m 50s
CRC cleanups. ci #370: Pull request #158 opened by enjoy-digital
March 26, 2024 11:41 9m 50s crc_cleanup
crc_cleanup
March 26, 2024 11:41 9m 50s
mac/crc: Cleanup and try to move data-path connection outside of FSM … ci #369: Commit bbdd683 pushed by enjoy-digital
March 26, 2024 10:55 9m 54s crc_cleanup
crc_cleanup
March 26, 2024 10:55 9m 54s
liteeth_mac: Cleanup LiteEthMACCRC32. ci #368: Commit c9170b3 pushed by enjoy-digital
March 26, 2024 08:51 2m 18s crc_cleanup
crc_cleanup
March 26, 2024 08:51 2m 18s
phy/a7_1000basex: Switch txoutclk buffer to BUFG. ci #367: Commit 4af0c77 pushed by enjoy-digital
March 25, 2024 15:00 10m 20s master
master
March 25, 2024 15:00 10m 20s
phy/a7_1000basex: Add parameters to allow selecting TX/RX Clock Manag… ci #366: Commit 292551a pushed by enjoy-digital
March 22, 2024 11:28 11m 15s master
master
March 22, 2024 11:28 11m 15s
mac/crc.py: optimize CRC validation ci #365: Pull request #157 synchronize by rowanG077
March 21, 2024 00:55 10m 16s rowanG077:opt-crc-validation
rowanG077:opt-crc-validation
March 21, 2024 00:55 10m 16s
mac/crc.py: optimize CRC validation ci #364: Pull request #157 opened by rowanG077
March 21, 2024 00:48 5m 37s rowanG077:opt-crc-validation
rowanG077:opt-crc-validation
March 21, 2024 00:48 5m 37s
liteeth_gen: Allow selection QPLL channel on Artix7 through qpll_chan… ci #363: Commit 1a5d935 pushed by enjoy-digital
March 19, 2024 16:56 10m 26s master
master
March 19, 2024 16:56 10m 26s
liteeth_gen: Allow external QPLL on Artix7 to allow multiple PHYs per… ci #362: Commit 5eb986b pushed by enjoy-digital
March 18, 2024 13:24 10m 8s master
master
March 18, 2024 13:24 10m 8s
liteeth_gen: Add optional --name parameter to configure generated ver… ci #361: Commit 0914fb5 pushed by enjoy-digital
March 18, 2024 12:49 10m 10s master
master
March 18, 2024 12:49 10m 10s
liteeth_gen: Add optional name parameter to configure generated veril… ci #360: Commit d6e7aac pushed by enjoy-digital
March 18, 2024 12:46 10m 7s master
master
March 18, 2024 12:46 10m 7s
core/dhcp: Lease time support ci #359: Pull request #148 synchronize by rowanG077
March 4, 2024 16:26 10m 33s rowanG077:dhcp-opts
rowanG077:dhcp-opts
March 4, 2024 16:26 10m 33s
core/dhcp: Lease time support ci #358: Pull request #148 synchronize by rowanG077
March 4, 2024 14:10 10m 40s rowanG077:dhcp-opts
rowanG077:dhcp-opts
March 4, 2024 14:10 10m 40s
liteeth_gen: Make udp_ports definition optional in .yml file (ex for … ci #357: Commit 3061bf9 pushed by enjoy-digital
February 29, 2024 13:57 10m 21s master
master
February 29, 2024 13:57 10m 21s
liteeth_gen: Remove unwanted data_width assertion on Etherbone. ci #356: Commit 21ff1b9 pushed by enjoy-digital
February 29, 2024 13:49 10m 23s master
master
February 29, 2024 13:49 10m 23s
phy/Ultrascale/1000BaseX: Configure PROGDIV_CFG from linerate. ci #355: Commit b4e2850 pushed by enjoy-digital
February 7, 2024 10:34 10m 5s master
master
February 7, 2024 10:34 10m 5s
phy/Ultrascale/1000BaseX: Switch to LiteICLink's ChannelPLL for more … ci #354: Commit 80ba793 pushed by enjoy-digital
February 7, 2024 08:24 10m 0s master
master
February 7, 2024 08:24 10m 0s
liteeth_gen: Finish Artix7 2500BaseX integration. ci #353: Commit 8f521d8 pushed by enjoy-digital
February 6, 2024 17:27 10m 7s master
master
February 6, 2024 17:27 10m 7s
README: List 2500BaseX support. ci #352: Commit 1fefe49 pushed by enjoy-digital
January 23, 2024 14:57 10m 11s master
master
January 23, 2024 14:57 10m 11s
liteeth_phy: Merge a7_2500basex in a7_1000basex and handle changes th… ci #351: Commit 19c5551 pushed by enjoy-digital
January 23, 2024 14:24 9m 56s master
master
January 23, 2024 14:24 9m 56s
liteeth_gen: Add A7_2500BASEX support. ci #350: Commit 5a1caed pushed by enjoy-digital
January 23, 2024 12:54 10m 0s master
master
January 23, 2024 12:54 10m 0s
liteeth_gen: Add TX/RX polarity support to SGMII/1000BASEX PHYs. ci #349: Commit a00c9a3 pushed by enjoy-digital
January 23, 2024 11:46 10m 12s master
master
January 23, 2024 11:46 10m 12s