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CONTRIBUTORS: Update. ci #430: Commit a75f4e5 pushed by enjoy-digital
September 20, 2024 10:28 9m 56s master
master
September 20, 2024 10:28 9m 56s
frontend/etherbone/LiteEthEtherbonePacketRX: Only enable LiteEthLastH… ci #429: Commit dd1988a pushed by enjoy-digital
September 20, 2024 10:15 9m 48s master
master
September 20, 2024 10:15 9m 48s
core: Expose icmp_fifo_depth paramter. ci #428: Commit d5a9f9d pushed by enjoy-digital
September 19, 2024 20:19 12m 10s master
master
September 19, 2024 20:19 12m 10s
Merge pull request #171 from GustavsC/master ci #427: Commit b61c3e5 pushed by enjoy-digital
September 18, 2024 09:19 10m 38s master
master
September 18, 2024 09:19 10m 38s
Merge pull request #169 from VOGL-electronic/fix_phy_rmii_efinix ci #425: Commit 5bc0ec0 pushed by enjoy-digital
September 17, 2024 19:20 10m 28s master
master
September 17, 2024 19:20 10m 28s
phy/xgmii: Add Clk/Data Pads definition to avoid duplication in PHYs. ci #424: Commit b573e12 pushed by enjoy-digital
September 16, 2024 09:35 10m 13s master
master
September 16, 2024 09:35 10m 13s
phy: rmii: use ClockSignal(refclk_cd) to drive DDROutput ci #423: Pull request #169 opened by maass-hamburg
September 13, 2024 10:08 10m 22s VOGL-electronic:fix_phy_rmii_efinix
VOGL-electronic:fix_phy_rmii_efinix
September 13, 2024 10:08 10m 22s
frontend/stream: Add 64-bit data_width support. ci #422: Commit 78513c2 pushed by enjoy-digital
September 12, 2024 16:46 10m 7s master
master
September 12, 2024 16:46 10m 7s
frontend/etherbone: Add LiteEthLastHandler to LiteEthEtherbonePacketR… ci #421: Commit b1f916a pushed by enjoy-digital
September 12, 2024 11:34 10m 30s master
master
September 12, 2024 11:34 10m 30s
liteeth_gen: Add XGMII PHY support (Transceiver still need to be inte… ci #420: Commit a2a862d pushed by enjoy-digital
September 11, 2024 13:21 10m 22s master
master
September 11, 2024 13:21 10m 22s
Merge pull request #168 from trabucayre/efinix_rework_primitives ci #419: Commit 74bd085 pushed by trabucayre
September 10, 2024 16:41 9m 54s master
master
September 10, 2024 16:41 9m 54s
Efinix rework primitives ci #418: Pull request #168 opened by trabucayre
September 10, 2024 10:11 10m 2s trabucayre:efinix_rework_primitives
trabucayre:efinix_rework_primitives
September 10, 2024 10:11 10m 2s
ci ci #417: by trabucayre
September 4, 2024 12:48 10m 20s master
master
September 4, 2024 12:48 10m 20s
phy/trionrgmii.py: fixed RX and TX sides. RX: forces phase align by u… ci #416: Commit ecaebfe pushed by trabucayre
September 3, 2024 12:10 10m 23s master
master
September 3, 2024 12:10 10m 23s
Merge pull request #167 from VOGL-electronic/fix_liteethmac ci #415: Commit 9780327 pushed by enjoy-digital
August 27, 2024 07:20 12m 8s master
master
August 27, 2024 07:20 12m 8s
mac/__init__.py: Improve/Cleanup LiteEthMAC. ci #413: Commit edc7188 pushed by enjoy-digital
August 19, 2024 08:20 10m 5s master
master
August 19, 2024 08:20 10m 5s
mac/__init__: Add comments on RX broadcard/filtering and minor cleanups. ci #412: Commit bfc07e5 pushed by enjoy-digital
August 19, 2024 07:59 10m 12s master
master
August 19, 2024 07:59 10m 12s
Merge pull request #165 from VOGL-electronic/fix_packet_handling ci #411: Commit 55bae6b pushed by enjoy-digital
August 19, 2024 07:27 9m 47s master
master
August 19, 2024 07:27 9m 47s
Merge pull request #166 from VOGL-electronic/fix_etherbone ci #410: Commit 9531af6 pushed by enjoy-digital
August 19, 2024 07:26 9m 53s master
master
August 19, 2024 07:26 9m 53s
phy/a7_gtp: Add separators and remove __all__. ci #409: Commit 964df3a pushed by enjoy-digital
August 19, 2024 07:24 9m 56s master
master
August 19, 2024 07:24 9m 56s
Merge pull request #164 from VOGL-electronic/optional_liteiclink ci #408: Commit c04ac8f pushed by enjoy-digital
August 19, 2024 07:17 10m 5s master
master
August 19, 2024 07:17 10m 5s
phy/a7_gtp: Add additionnal comment to #163 and express delay in us. ci #407: Commit d4fa6a2 pushed by enjoy-digital
August 19, 2024 07:16 10m 3s master
master
August 19, 2024 07:16 10m 3s
Merge pull request #163 from cyntem/patch-1 ci #406: Commit 32df452 pushed by enjoy-digital
August 19, 2024 07:14 12m 40s master
master
August 19, 2024 07:14 12m 40s
Update a7_gtp.py transceiver resets have to stay low for 10us. ci #401: Pull request #163 opened by cyntem
July 14, 2024 17:08 9m 55s cyntem:patch-1
cyntem:patch-1
July 14, 2024 17:08 9m 55s
phy/1000basex: Use pll.config["d"] to compute TX_PROGDIV_CFG/RX_PROGD… ci #400: Commit 583137e pushed by enjoy-digital
July 10, 2024 14:57 9m 57s master
master
July 10, 2024 14:57 9m 57s