Skip to content

Commit

Permalink
ice: fix pin phase adjust updates on PF reset
Browse files Browse the repository at this point in the history
Do not allow to set phase adjust value for a pin if PF reset is in
progress, this would cause confusing netlink extack errors as the firmware
cannot process the request properly during the reset time.

Return (-EBUSY) and report extack error for the user who tries configure
pin phase adjust during the reset time.

Test by looping execution of below steps until netlink error appears:
- perform PF reset
$ echo 1 > /sys/class/net/<ice PF>/device/reset
- change pin phase adjust value:
$ ./tools/net/ynl/cli.py --spec Documentation/netlink/specs/dpll.yaml \
	--do pin-set --json '{"id":0, "phase-adjust":1000}'

Fixes: 90e1c90 ("ice: dpll: implement phase related callbacks")
Reviewed-by: Igor Bagnucki <[email protected]>
Signed-off-by: Arkadiusz Kubalewski <[email protected]>
Tested-by: Pucha Himasekhar Reddy <[email protected]> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <[email protected]>
  • Loading branch information
kubalewski authored and anguy11 committed Feb 20, 2024
1 parent 9a8385f commit ee89921
Showing 1 changed file with 3 additions and 0 deletions.
3 changes: 3 additions & 0 deletions drivers/net/ethernet/intel/ice/ice_dpll.c
Original file line number Diff line number Diff line change
Expand Up @@ -963,6 +963,9 @@ ice_dpll_pin_phase_adjust_set(const struct dpll_pin *pin, void *pin_priv,
u8 flag, flags_en = 0;
int ret;

if (ice_dpll_is_reset(pf, extack))
return -EBUSY;

mutex_lock(&pf->dplls.lock);
switch (type) {
case ICE_DPLL_PIN_TYPE_INPUT:
Expand Down

0 comments on commit ee89921

Please sign in to comment.