Fix linkerscript for esp32s3 rtc fast ram region

esp-rs · Oct 24, 2023 · 261e49b · 261e49b
1 parent aa79f3b
commit 261e49b
Show file tree

Hide file tree

Showing 13 changed files with 40 additions and 75 deletions.
diff --git a/esp-hal-common/build.rs b/esp-hal-common/build.rs
@@ -173,8 +173,24 @@ fn main() -> Result<(), Box<dyn Error>> {
     println!("cargo:rustc-link-search={}", out.display());
 
     if cfg!(feature = "esp32") || cfg!(feature = "esp32s2") || cfg!(feature = "esp32s3") {
-        fs::copy("ld/xtensa/hal-defaults.x", out.join("hal-defaults.x"))?;
-        fs::copy("ld/xtensa/rom.x", out.join("alias.x"))?;
+        fs::copy("ld/xtensa/hal-defaults.x", out.join("hal-defaults.x")).unwrap();
+        let (irtc, drtc) = if cfg!(feature = "esp32s3") {
+            ("rtc_fast_seg", "rtc_fast_seg")
+        } else {
+            ("rtc_fast_iram_seg", "rtc_fast_dram_seg")
+        };
+        let alias = format!(
+            r#"
+            REGION_ALIAS("ROTEXT", irom_seg);
+            REGION_ALIAS("RWTEXT", iram_seg);
+            REGION_ALIAS("RODATA", drom_seg);
+            REGION_ALIAS("RWDATA", dram_seg);
+            REGION_ALIAS("RTC_FAST_RWTEXT", {});
+            REGION_ALIAS("RTC_FAST_RWDATA", {});
+        "#,
+            irtc, drtc
+        );
+        fs::write(out.join("alias.x"), alias).unwrap();
     } else {
         fs::copy("ld/riscv/hal-defaults.x", out.join("hal-defaults.x"))?;
         fs::copy("ld/riscv/asserts.x", out.join("asserts.x"))?;

diff --git a/esp-hal-common/ld/xtensa/rom.x b/esp-hal-common/ld/xtensa/rom.x
diff --git a/esp32-hal/.cargo/config.toml b/esp32-hal/.cargo/config.toml
@@ -3,13 +3,13 @@ runner = "espflash flash --monitor"
 
 [build]
 rustflags = [
-  # GCC
-  # "-C", "link-arg=-nostartfiles",
-  # "-C", "link-arg=-Wl,-Tlinkall.x",
+  # GNU LD
+  "-C", "link-arg=-nostartfiles",
+  "-C", "link-arg=-Wl,-Tlinkall.x",
 
   # LLD
-  "-C", "linker=rust-lld",
-  "-C", "link-arg=-Tlinkall.x",
+  # "-C", "linker=rust-lld",
+  # "-C", "link-arg=-Tlinkall.x",
 ]
 target = "xtensa-esp32-none-elf"
 

diff --git a/esp32-hal/build.rs b/esp32-hal/build.rs
@@ -41,10 +41,6 @@ fn generate_memory_extras() -> Vec<u8> {
         "
     /* reserved at the start of DRAM for e.g. the BT stack */
     RESERVE_DRAM = {reserve_dram};
-    
-    /* reserved at the start of the RTC memories for use by the ULP processor */
-    RESERVE_RTC_FAST = 0;
-    RESERVE_RTC_SLOW = 0;
         "
     )
     .as_bytes()

diff --git a/esp32-hal/ld/memory.x b/esp32-hal/ld/memory.x
@@ -45,9 +45,9 @@ MEMORY
   rtc_fast_iram_seg(RWX) : ORIGIN = 0x400C0000, len = 8k
 
   /* RTC fast memory (same block as above), viewed from data bus. Only for core 0 (PRO_CPU) */
-  rtc_fast_dram_seg(RW)  : ORIGIN = 0x3FF80000 + RESERVE_RTC_FAST, len = 8k - RESERVE_RTC_FAST
+  rtc_fast_dram_seg(RW)  : ORIGIN = 0x3FF80000, len = 8k
 
   /* RTC slow memory (data accessible). Persists over deep sleep. */
-  rtc_slow_seg(RW)       : ORIGIN = 0x50000000 + RESERVE_RTC_SLOW, len = 8k - RESERVE_RTC_SLOW
+  rtc_slow_seg(RW)       : ORIGIN = 0x50000000, len = 8k
 }
 
diff --git a/esp32s2-hal/.cargo/config.toml b/esp32s2-hal/.cargo/config.toml
@@ -3,7 +3,7 @@ runner = "espflash flash --monitor"
 
 [build]
 rustflags = [
-  # GCC
+  # GNU LD
   "-C", "link-arg=-nostartfiles",
   "-C", "link-arg=-Wl,-Tlinkall.x",
 

diff --git a/esp32s2-hal/ld/memory.x b/esp32s2-hal/ld/memory.x
@@ -12,10 +12,6 @@ INCLUDE "memory_extras.x"
 
 VECTORS_SIZE = 0x400;
 
-/* reserved at the start of the RTC memories for use by the ULP processor */
-RESERVE_RTC_FAST = 0;
-RESERVE_RTC_SLOW = 0;
-
 /* Specify main memory areas */
 MEMORY
 {
@@ -39,7 +35,7 @@ MEMORY
   rtc_fast_iram_seg(RWX) : ORIGIN = 0x40070000, len = 8k
 
   /* RTC fast memory (same block as above), viewed from data bus. Only for core 0 (PRO_CPU) */
-  rtc_fast_dram_seg(RW)  : ORIGIN = 0x3ff9e000 + RESERVE_RTC_FAST, len = 8k - RESERVE_RTC_FAST
+  rtc_fast_dram_seg(RW)  : ORIGIN = 0x3ff9e000, len = 8k
 
   /* RTC slow memory (data accessible). Persists over deep sleep. */
   rtc_slow_seg(RW)       : ORIGIN = 0x50000000 + RESERVE_RTC_SLOW, len = 8k - RESERVE_RTC_SLOW

diff --git a/esp32s3-hal/.cargo/config.toml b/esp32s3-hal/.cargo/config.toml
@@ -4,12 +4,12 @@ runner = "espflash flash --monitor"
 [build]
 rustflags = [
   # GNU LD
-  # "-C", "link-arg=-nostartfiles",
-  # "-C", "link-arg=-Wl,-Tlinkall.x",
+  "-C", "link-arg=-nostartfiles",
+  "-C", "link-arg=-Wl,-Tlinkall.x",
 
   # LLD
-  "-C", "linker=rust-lld",
-  "-C", "link-arg=-Tlinkall.x",
+  # "-C", "linker=rust-lld",
+  # "-C", "link-arg=-Tlinkall.x",
 ]
 target = "xtensa-esp32s3-none-elf"
 

diff --git a/esp32s3-hal/ld/db-esp32s3.x b/esp32s3-hal/ld/db-esp32s3.x
@@ -189,7 +189,7 @@ SECTIONS {
     _stack_end = ABSOLUTE(.);
   } > RWDATA
 
-  .rtc_fast.text ORIGIN(rtc_fast_iram_seg) : 
+  .rtc_fast.text ORIGIN(rtc_fast_seg) : 
   {
    . = ALIGN(4);
    _rtc_fast_text_start = ABSOLUTE(.);
@@ -198,18 +198,8 @@ SECTIONS {
    _rtc_fast_text_end = ABSOLUTE(.);
   }
   _irtc_fast_text = ORIGIN(RODATA) + _text_size + SIZEOF(.header) + SIZEOF(.pre_header) + SIZEOF(.rodata) + SIZEOF(.rwtext);
-
-  .rtc_fast.data ORIGIN(rtc_fast_dram_seg) + SIZEOF(.rtc_fast.text) : 
-  {
-    . = ALIGN(4);
-    _rtc_fast_data_start = ABSOLUTE(.);
-    *(.rtc_fast.data .rtc_fast.data.*)
-   . = ALIGN(4);
-    _rtc_fast_data_end = ABSOLUTE(.);
-  }
-  _irtc_fast_data = ORIGIN(RODATA) + _text_size + SIZEOF(.header) + SIZEOF(.pre_header) + SIZEOF(.rodata) + SIZEOF(.rwtext) + SIZEOF(.rtc_fast.text);
 
- .rtc_fast.bss ORIGIN(rtc_fast_dram_seg) + SIZEOF(.rtc_fast.text) + SIZEOF(.rtc_fast.data) (NOLOAD) : 
+ .rtc_fast.bss ORIGIN(rtc_fast_seg) + SIZEOF(.rtc_fast.text) (NOLOAD) : 
   {
     . = ALIGN(4);
     _rtc_fast_bss_start = ABSOLUTE(.);
@@ -218,7 +208,7 @@ SECTIONS {
     _rtc_fast_bss_end = ABSOLUTE(.);
   }
 
- .rtc_fast.noinit ORIGIN(rtc_fast_dram_seg) + SIZEOF(.rtc_fast.text) + SIZEOF(.rtc_fast.data) + SIZEOF(.rtc_fast.bss) (NOLOAD)  :
+ .rtc_fast.noinit ORIGIN(rtc_fast_seg) + SIZEOF(.rtc_fast.text) + SIZEOF(.rtc_fast.bss) (NOLOAD)  :
   {
     . = ALIGN(4);
     *(.rtc_fast.noinit .rtc_fast.noinit.*)
@@ -234,7 +224,7 @@ SECTIONS {
    _rtc_slow_text_end = ABSOLUTE(.);
   }
   _irtc_slow_text = ORIGIN(RODATA) + _text_size + SIZEOF(.header) + SIZEOF(.pre_header) + SIZEOF(.rodata) + SIZEOF(.rwtext) + 
-      SIZEOF(.rtc_fast.text) + SIZEOF(.rtc_fast.data) + SIZEOF(.rtc_fast.bss);
+      SIZEOF(.rtc_fast.text) + SIZEOF(.rtc_fast.bss);
 
   .rtc_slow.data ORIGIN(rtc_slow_seg) + SIZEOF(.rtc_slow.text) : 
   {
@@ -245,7 +235,7 @@ SECTIONS {
     _rtc_slow_data_end = ABSOLUTE(.);
   }
   _irtc_slow_data = ORIGIN(RODATA) + _text_size + SIZEOF(.header) + SIZEOF(.pre_header) + SIZEOF(.rodata) + SIZEOF(.rwtext) + 
-        SIZEOF(.rtc_fast.text) + SIZEOF(.rtc_fast.data) + SIZEOF(.rtc_fast.bss) + SIZEOF(.rtc_slow.text);
+        SIZEOF(.rtc_fast.text) + SIZEOF(.rtc_fast.bss) + SIZEOF(.rtc_slow.text);
 
  .rtc_slow.bss ORIGIN(rtc_slow_seg) + SIZEOF(.rtc_slow.text) + SIZEOF(.rtc_slow.data) (NOLOAD) : 
   {

diff --git a/esp32s3-hal/ld/db-memory.x b/esp32s3-hal/ld/db-memory.x
@@ -4,10 +4,6 @@ ENTRY(ESP32Reset)
 /* reserved at the start of DRAM */
 RESERVE_DRAM = 0x8000;
 
-/* reserved at the start of the RTC memories for use by the ULP processor */
-RESERVE_RTC_FAST = 0;
-RESERVE_RTC_SLOW = 0;
-
 /* Specify main memory areas */
 MEMORY
 {
@@ -28,11 +24,8 @@ MEMORY
 
 
   /* RTC fast memory (executable). Persists over deep sleep. Only for core 0 (PRO_CPU) */
-  rtc_fast_iram_seg(RWX) : ORIGIN = 0x600fe000, len = 8k
-
-  /* RTC fast memory (same block as above), viewed from data bus. Only for core 0 (PRO_CPU) */
-  rtc_fast_dram_seg(RW)  : ORIGIN = 0x600fe000 + RESERVE_RTC_FAST, len = 8k - RESERVE_RTC_FAST
+  rtc_fast_seg(RWX) : ORIGIN = 0x600fe000, len = 8k
 
   /* RTC slow memory (data accessible). Persists over deep sleep. */
-  rtc_slow_seg(RW)       : ORIGIN = 0x50000000 + RESERVE_RTC_SLOW, len = 8k - RESERVE_RTC_SLOW
+  rtc_slow_seg(RW)       : ORIGIN = 0x50000000, len = 8k
 }
diff --git a/esp32s3-hal/ld/link-esp32s3.x b/esp32s3-hal/ld/link-esp32s3.x
@@ -34,7 +34,6 @@ SECTIONS {
 INSERT BEFORE .data;
 
 INCLUDE "fixups/rodata_dummy.x"
-INCLUDE "fixups/rtc_fast_rwdata_dummy.x"
 /* End of ESP32S3 fixups */
 
 /* Shared sections - ordering matters */

diff --git a/esp32s3-hal/ld/memory.x b/esp32s3-hal/ld/memory.x
@@ -4,10 +4,6 @@ ENTRY(ESP32Reset)
 /* reserved for ICACHE */
 RESERVE_ICACHE = 0x8000;
 
-/* reserved at the start of the RTC memories for use by the ULP processor */
-RESERVE_RTC_FAST = 0;
-RESERVE_RTC_SLOW = 0;
-
 VECTORS_SIZE = 0x400;
 
 /* Specify main memory areas
@@ -40,11 +36,8 @@ MEMORY
 
 
   /* RTC fast memory (executable). Persists over deep sleep. Only for core 0 (PRO_CPU) */
-  rtc_fast_iram_seg(RWX) : ORIGIN = 0x600fe000, len = 8k
-
-  /* RTC fast memory (same block as above), viewed from data bus. Only for core 0 (PRO_CPU) */
-  rtc_fast_dram_seg(RW)  : ORIGIN = 0x600fe000 + RESERVE_RTC_FAST, len = 8k - RESERVE_RTC_FAST
+  rtc_fast_seg(RWX) : ORIGIN = 0x600fe000, len = 8k
 
   /* RTC slow memory (data accessible). Persists over deep sleep. */
-  rtc_slow_seg(RW)       : ORIGIN = 0x50000000 + RESERVE_RTC_SLOW, len = 8k - RESERVE_RTC_SLOW
+  rtc_slow_seg(RW)       : ORIGIN = 0x50000000, len = 8k
 }
diff --git a/esp32s3-hal/src/lib.rs b/esp32s3-hal/src/lib.rs
@@ -112,11 +112,6 @@ pub unsafe fn startup_direct_boot() -> ! {
         static mut _rtc_fast_text_end: u32;
         static mut _irtc_fast_text: u32;
 
-        // Boundaries of the .rtc_fast.data section
-        static mut _rtc_fast_data_start: u32;
-        static mut _rtc_fast_data_end: u32;
-        static mut _irtc_fast_data: u32;
-
         // Boundaries of the .rtc_slow.text section
         static mut _rtc_slow_text_start: u32;
         static mut _rtc_slow_text_end: u32;
@@ -133,13 +128,6 @@ pub unsafe fn startup_direct_boot() -> ! {
     // set stack pointer to end of memory: no need to retain stack up to this point
     xtensa_lx::set_stack_pointer(&mut _stack_end_cpu0);
 
-    // copy rtc data from flash to destinations
-    r0::init_data(
-        &mut _rtc_fast_data_start,
-        &mut _rtc_fast_data_end,
-        &_irtc_fast_data,
-    );
-
     r0::init_data(
         &mut _rtc_fast_text_start,
         &mut _rtc_fast_text_end,