Add DMA support for ESP32-S2

esp-hal-common/src/analog/adc/esp32s3.rs

@@ -161,7 +161,11 @@ impl RegisterAccess for ADC1 {
 
     fn read_done_sar() -> bool {
         let sensors = unsafe { &*SENS::ptr() };
-        sensors.sar_meas1_ctrl2.read().sar_meas1_done_sar().bit_is_set()
+        sensors
+            .sar_meas1_ctrl2
+            .read()
+            .sar_meas1_done_sar()
+            .bit_is_set()
     }
 
     fn read_data_sar() -> u16 {
@@ -238,7 +242,11 @@ impl RegisterAccess for ADC2 {
 
     fn read_done_sar() -> bool {
         let sensors = unsafe { &*SENS::ptr() };
-        sensors.sar_meas2_ctrl2.read().sar_meas2_done_sar().bit_is_set()
+        sensors
+            .sar_meas2_ctrl2
+            .read()
+            .sar_meas2_done_sar()
+            .bit_is_set()
     }
 
     fn read_data_sar() -> u16 {

esp-hal-common/src/dma/mod.rs

@@ -7,7 +7,7 @@ use private::*;
 #[cfg(esp32c3)]
 pub mod gdma;
 
-#[cfg(esp32)]
+#[cfg(any(esp32, esp32s2))]
 pub mod pdma;
 
 /// DMA Errors
@@ -62,7 +62,7 @@ pub enum DmaPeripheral {
 }
 
 /// DMA capable peripherals
-#[cfg(esp32)]
+#[cfg(any(esp32, esp32s2))]
 #[derive(Clone, Copy)]
 pub enum DmaPeripheral {
     Spi2 = 0,
@@ -175,7 +175,7 @@ pub(crate) mod private {
     pub trait Spi2Peripheral: SpiPeripheral + PeripheralMarker {}
 
     /// Marks channels as useable for SPI3
-    #[cfg(esp32)]
+    #[cfg(any(esp32, esp32s2))]
     pub trait Spi3Peripheral: SpiPeripheral + PeripheralMarker {}
 
     /// DMA Rx

esp-hal-common/src/dma/pdma.rs

@@ -13,20 +13,23 @@ macro_rules! ImplSpiChannel {
             impl RegisterAccess for [<Spi $num DmaChannel>] {
                 fn init_channel() {
                     // (only) on ESP32 we need to configure DPORT for the SPI DMA channels
-                    let dport = unsafe { &*crate::pac::DPORT::PTR };
-
-                    match $num {
-                        2 => {
-                            dport
-                            .spi_dma_chan_sel
-                            .modify(|_, w| w.spi2_dma_chan_sel().variant(1));
-                        },
-                        3 => {
-                            dport
-                            .spi_dma_chan_sel
-                            .modify(|_, w| w.spi3_dma_chan_sel().variant(2));
-                        },
-                        _ => panic!("Only SPI2 and SPI3 supported"),
+                    #[cfg(esp32)]
+                    {
+                        let dport = unsafe { &*crate::pac::DPORT::PTR };
+
+                        match $num {
+                            2 => {
+                                dport
+                                .spi_dma_chan_sel
+                                .modify(|_, w| w.spi2_dma_chan_sel().variant(1));
+                            },
+                            3 => {
+                                dport
+                                .spi_dma_chan_sel
+                                .modify(|_, w| w.spi3_dma_chan_sel().variant(2));
+                            },
+                            _ => panic!("Only SPI2 and SPI3 supported"),
+                        }
                     }
                 }
 

esp-hal-common/src/lib.rs

@@ -90,7 +90,7 @@ pub mod efuse;
 #[cfg_attr(xtensa, path = "interrupt/xtensa.rs")]
 pub mod interrupt;
 
-#[cfg(any(esp32c3, esp32))]
+#[cfg(any(esp32c3, esp32, esp32s2))]
 pub mod dma;
 
 /// Enumeration of CPU cores

esp-hal-common/src/spi.rs

@@ -50,9 +50,9 @@
 
 use fugit::HertzU32;
 
-#[cfg(any(esp32c3, esp32))]
+#[cfg(any(esp32c3, esp32, esp32s2))]
 use crate::dma::private::{Rx, Tx};
-#[cfg(any(esp32c3, esp32))]
+#[cfg(any(esp32c3, esp32, esp32s2))]
 use crate::dma::{DmaError, DmaPeripheral};
 use crate::{
     clock::Clocks,
@@ -76,13 +76,13 @@ const MAX_DMA_SIZE: usize = 32736;
 
 #[derive(Debug, Clone, Copy)]
 pub enum Error {
-    #[cfg(any(esp32c3, esp32))]
+    #[cfg(any(esp32c3, esp32, esp32s2))]
     DmaError(DmaError),
     MaxDmaTransferSizeExceeded,
     Unknown,
 }
 
-#[cfg(any(esp32c3, esp32))]
+#[cfg(any(esp32c3, esp32, esp32s2))]
 impl From<DmaError> for Error {
     fn from(value: DmaError) -> Self {
         Error::DmaError(value)
@@ -262,16 +262,16 @@ where
     }
 }
 
-#[cfg(any(esp32c3, esp32))]
+#[cfg(any(esp32c3, esp32, esp32s2))]
 pub mod dma {
     use core::mem;
 
     use embedded_dma::{ReadBuffer, WriteBuffer};
 
-    #[cfg(esp32)]
+    #[cfg(any(esp32, esp32s2))]
     use super::Spi3Instance;
     use super::{Instance, InstanceDma, Spi, Spi2Instance, MAX_DMA_SIZE};
-    #[cfg(esp32)]
+    #[cfg(any(esp32, esp32s2))]
     use crate::dma::private::Spi3Peripheral;
     use crate::dma::{
         private::{Rx, Spi2Peripheral, SpiPeripheral, Tx},
@@ -290,7 +290,7 @@ pub mod dma {
         fn with_dma(self, channel: Channel<TX, RX, P>) -> SpiDma<T, TX, RX, P>;
     }
 
-    #[cfg(esp32)]
+    #[cfg(any(esp32, esp32s2))]
     pub trait WithDmaSpi3<T, RX, TX, P>
     where
         T: Instance + Spi3Instance,
@@ -318,7 +318,7 @@ pub mod dma {
         }
     }
 
-    #[cfg(esp32)]
+    #[cfg(any(esp32, esp32s2))]
     impl<T, RX, TX, P> WithDmaSpi3<T, RX, TX, P> for Spi<T>
     where
         T: Instance + Spi3Instance,
@@ -916,7 +916,7 @@ mod ehal1 {
     }
 }
 
-#[cfg(any(esp32c3, esp32))]
+#[cfg(any(esp32c3, esp32, esp32s2))]
 pub trait InstanceDma<TX, RX>: Instance
 where
     TX: Tx,
@@ -1065,7 +1065,7 @@ where
     fn dma_peripheral(&self) -> DmaPeripheral {
         match self.spi_num() {
             2 => DmaPeripheral::Spi2,
-            #[cfg(esp32)]
+            #[cfg(any(esp32, esp32s2))]
             3 => DmaPeripheral::Spi3,
             _ => panic!("Illegal SPI instance"),
         }
@@ -1078,7 +1078,7 @@ where
         reg_block.dma_conf.modify(|_, w| w.dma_rx_ena().set_bit());
     }
 
-    #[cfg(esp32)]
+    #[cfg(any(esp32, esp32s2))]
     fn enable_dma(&self) {
         // for non GDMA this is done in `assign_tx_device` / `assign_rx_device`
     }
@@ -1100,7 +1100,7 @@ where
         });
     }
 
-    #[cfg(esp32)]
+    #[cfg(any(esp32, esp32s2))]
     fn clear_dma_interrupts(&self) {
         let reg_block = self.register_block();
         reg_block.dma_int_clr.write(|w| {
@@ -1126,15 +1126,15 @@ where
     }
 }
 
-#[cfg(any(esp32c3, esp32))]
+#[cfg(any(esp32c3, esp32, esp32s2))]
 impl<TX, RX> InstanceDma<TX, RX> for crate::pac::SPI2
 where
     TX: Tx,
     RX: Rx,
 {
 }
 
-#[cfg(any(esp32))]
+#[cfg(any(esp32, esp32s2))]
 impl<TX, RX> InstanceDma<TX, RX> for crate::pac::SPI3
 where
     TX: Tx,
@@ -1706,10 +1706,10 @@ impl Instance for crate::pac::SPI3 {
 
 pub trait Spi2Instance {}
 
-#[cfg(esp32)]
+#[cfg(any(esp32, esp32s2))]
 pub trait Spi3Instance {}
 
 impl Spi2Instance for crate::pac::SPI2 {}
 
-#[cfg(esp32)]
+#[cfg(any(esp32, esp32s2))]
 impl Spi3Instance for crate::pac::SPI3 {}

esp-hal-common/src/system.rs

@@ -28,7 +28,7 @@ pub enum Peripheral {
     ApbSarAdc,
     #[cfg(esp32c3)]
     Gdma,
-    #[cfg(esp32)]
+    #[cfg(any(esp32, esp32s2))]
     Dma,
 }
 
@@ -99,6 +99,13 @@ impl PeripheralClockControl {
                 perip_clk_en0.modify(|_, w| w.spi_dma_clk_en().set_bit());
                 perip_rst_en0.modify(|_, w| w.spi_dma_rst().clear_bit());
             }
+            #[cfg(esp32s2)]
+            Peripheral::Dma => {
+                perip_clk_en0.modify(|_, w| w.spi2_dma_clk_en().set_bit());
+                perip_rst_en0.modify(|_, w| w.spi2_dma_rst().clear_bit());
+                perip_clk_en0.modify(|_, w| w.spi3_dma_clk_en().set_bit());
+                perip_rst_en0.modify(|_, w| w.spi3_dma_rst().clear_bit());
+            }
         }
     }
 }
@@ -113,8 +120,8 @@ pub struct CpuControl {
     _private: (),
 }
 
-/// Controls the configuration of the chip's clocks.
-#[cfg(esp32)]
+/// Dummy DMA peripheral.
+#[cfg(any(esp32, esp32s2))]
 pub struct Dma {
     _private: (),
 }
@@ -125,7 +132,7 @@ pub struct SystemParts {
     pub peripheral_clock_control: PeripheralClockControl,
     pub clock_control: SystemClockControl,
     pub cpu_control: CpuControl,
-    #[cfg(esp32)]
+    #[cfg(any(esp32, esp32s2))]
     pub dma: Dma,
 }
 
@@ -147,7 +154,7 @@ impl SystemExt for SystemPeripheral {
             peripheral_clock_control: PeripheralClockControl { _private: () },
             clock_control: SystemClockControl { _private: () },
             cpu_control: CpuControl { _private: () },
-            #[cfg(esp32)]
+            #[cfg(any(esp32, esp32s2))]
             dma: Dma { _private: () },
         }
     }

esp32s2-hal/examples/adc.rs

@@ -34,14 +34,15 @@ fn main() -> ! {
     rtc.rwdt.disable();
 
     let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
-    //let pin3 = io.pins.gpio3.into_analog();
+    // let pin3 = io.pins.gpio3.into_analog();
 
     // Create ADC instances
     let analog = peripherals.SENS.split();
 
     let mut adc1_config = AdcConfig::new();
 
-    let mut pin3 = adc1_config.enable_pin(io.pins.gpio3.into_analog(), Attenuation::Attenuation11dB);
+    let mut pin3 =
+        adc1_config.enable_pin(io.pins.gpio3.into_analog(), Attenuation::Attenuation11dB);
 
     let mut adc1 = ADC::<ADC1>::adc(analog.adc1, adc1_config).unwrap();
 

esp32s2-hal/examples/hello_world.rs

@@ -40,4 +40,4 @@ fn main() -> ! {
         writeln!(serial0, "Hello world!").unwrap();
         block!(timer0.wait()).unwrap();
     }
-}
+}