Fix 1GB elfs

esp-rs · Aug 16, 2024 · bb18e94 · bb18e94
1 parent 6127f5d
commit bb18e94
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Showing 3 changed files with 1 addition and 16 deletions.
diff --git a/esp-hal/CHANGELOG.md b/esp-hal/CHANGELOG.md
@@ -33,6 +33,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - SPI: disable and re-enable MISO and MOSI in `start_transfer_dma`, `start_read_bytes_dma` and `start_write_bytes_dma` accordingly (#1894)
 - TWAI: GPIO pins are not configured as input and output (#1906)
 - ESP32C6: Make ADC usable after TRNG deinicialization (#1945)
+- We should no longer generate 1GB .elf files for ESP32C2 and ESP32C3 (#1962)
 
 ### Removed
 

diff --git a/esp-hal/ld/esp32c2/esp32c2.x b/esp-hal/ld/esp32c2/esp32c2.x
@@ -36,14 +36,6 @@ PROVIDE(_mp_hook = default_mp_hook);
 PROVIDE(_start_trap = default_start_trap);
 
 /* esp32c2 fixups */
-SECTIONS {
-  .text.dummy (NOLOAD) :
-  {
-    /* This section is intended to make _stext address work */
-    . = ABSOLUTE(_stext);
-  } > ROTEXT
-}
-INSERT BEFORE .text;
 
 SECTIONS {
   .trap : ALIGN(4)

diff --git a/esp-hal/ld/esp32c3/esp32c3.x b/esp-hal/ld/esp32c3/esp32c3.x
@@ -36,14 +36,6 @@ PROVIDE(_mp_hook = default_mp_hook);
 PROVIDE(_start_trap = default_start_trap);
 
 /* esp32c3 fixups */
-SECTIONS {
-  .text.dummy (NOLOAD) :
-  {
-    /* This section is intended to make _stext address work */
-    . = ABSOLUTE(_stext);
-  } > ROTEXT
-}
-INSERT BEFORE .text;
 
 SECTIONS {
   .trap : ALIGN(4)