Add initial support for the ESP32-P4 (#1101)

* Add `esp32p4` feature to `esp-hal-procmacros` * Add `esp32p4` feature to `esp-hal-common` * Create the `esp32p4-hal` package * Add ESP32-P4 to CI workflow * Fix a silly typo :) * Update `CHANGELOG.md`
esp-rs · Jan 22, 2024 · e5cd1bd · e5cd1bd
1 parent 8ac075a
commit e5cd1bd
Show file tree

Hide file tree

Showing 31 changed files with 829 additions and 67 deletions.
diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
@@ -429,6 +429,38 @@ jobs:
       - name: rustdoc
         run: cd esp32h2-hal/ && cargo doc --features=eh1
 
+  esp32p4-hal:
+    runs-on: ubuntu-latest
+
+    steps:
+      - uses: actions/checkout@v4
+      - uses: dtolnay/rust-toolchain@v1
+        with:
+          target: riscv32imafc-unknown-none-elf
+          toolchain: nightly
+          components: rust-src
+      - uses: Swatinem/rust-cache@v2
+
+      # Perform a full build initially to verify that the examples not only
+      # build, but also link successfully.
+      # We also use this as an opportunity to verify that the examples link
+      # for each supported image format.
+      - name: build esp32p4-hal (no features)
+        run: cd esp32p4-hal/ && cargo +nightly build --examples
+      # Subsequent steps can just check the examples instead, as we're already
+      # confident that they link.
+      - name: check esp32p4-hal (common features)
+        run: |
+          cd esp32p4-hal/
+          cargo +nightly build --examples --features=eh1,ufmt,log
+          cargo +nightly build --examples --features=eh1,ufmt,defmt
+      # Make sure we can build without default features enabled, too!
+      - name: check esp32p4-hal (no default features)
+        run: cd esp32p4-hal/ && cargo build --no-default-features
+      # Ensure documentation can be built
+      - name: rustdoc
+        run: cd esp32p4-hal/ && cargo doc --features=eh1
+
   esp32s2-hal:
     runs-on: ubuntu-latest
 
@@ -604,7 +636,7 @@ jobs:
       - uses: actions/checkout@v4
       - uses: dtolnay/rust-toolchain@v1
         with:
-          target: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf
+          target: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf #,riscv32imafc-unknown-none-elf
           toolchain: ${{ env.MSRV }}
           components: rust-src
       - uses: Swatinem/rust-cache@v2
@@ -639,6 +671,11 @@ jobs:
           cd esp32h2-hal/
           cargo build --features=eh1,ufmt,log
           cargo build --features=defmt
+      # - name: msrv (esp32p4-hal)
+      #   run: |
+      #     cd esp32p4-hal/
+      #     cargo build --features=eh1,ufmt,log
+      #     cargo build --features=defmt
 
   msrv-xtensa:
     runs-on: ubuntu-latest
@@ -712,6 +749,8 @@ jobs:
         run: cd esp32c6-lp-hal && cargo clippy -- -D warnings
       - name: clippy (esp32h2-hal)
         run: cd esp32h2-hal && cargo clippy -- -D warnings
+      - name: clippy (esp32p4-hal)
+        run: cd esp32p4-hal && cargo clippy -- -D warnings
 
   clippy-xtensa:
     runs-on: ubuntu-latest
@@ -767,6 +806,8 @@ jobs:
         run: cargo fmt --all --manifest-path=esp32c6-lp-hal/Cargo.toml -- --check
       - name: rustfmt (esp32h2-hal)
         run: cargo fmt --all --manifest-path=esp32h2-hal/Cargo.toml -- --check
+      - name: rustfmt (esp32p4-hal)
+        run: cargo fmt --all --manifest-path=esp32p4-hal/Cargo.toml -- --check
       - name: rustfmt (esp32s2-hal)
         run: cargo fmt --all --manifest-path=esp32s2-hal/Cargo.toml -- --check
       - name: rustfmt (esp32s3-hal)

diff --git a/.vscode/settings.json b/.vscode/settings.json
@@ -13,13 +13,14 @@
   // This makes rust-analyzer work on the HAL crate and all its dependencies.
   "rust-analyzer.linkedProjects": [
     "esp32-hal/Cargo.toml"
-    // "esp32c2-hal/Cargo.toml",
-    // "esp32c3-hal/Cargo.toml",
-    // "esp32c6-hal/Cargo.toml",
-    // "esp32c6-lp-hal/Cargo.toml",
-    // "esp32h2-hal/Cargo.toml",
-    // "esp32s2-hal/Cargo.toml",
-    // "esp32s3-hal/Cargo.toml",
+    // "esp32c2-hal/Cargo.toml"
+    // "esp32c3-hal/Cargo.toml"
+    // "esp32c6-hal/Cargo.toml"
+    // "esp32c6-lp-hal/Cargo.toml"
+    // "esp32h2-hal/Cargo.toml"
+    // "esp32p4-hal/Cargo.toml"
+    // "esp32s2-hal/Cargo.toml"
+    // "esp32s3-hal/Cargo.toml"
   ],
 
   "[toml]": {

diff --git a/CHANGELOG.md b/CHANGELOG.md
@@ -11,6 +11,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 
 ### Added
 
+- Add initial support for the ESP32-P4 (#1101)
+
 ### Fixed
 
 ### Changed

diff --git a/README.md b/README.md
@@ -4,7 +4,7 @@
 ![MIT/Apache-2.0 licensed](https://img.shields.io/badge/license-MIT%2FApache--2.0-blue?style=flat-square)
 [![Matrix](https://img.shields.io/matrix/esp-rs:matrix.org?label=join%20matrix&color=BEC5C9&logo=matrix&style=flat-square)](https://matrix.to/#/#esp-rs:matrix.org)
 
-**H**ardware **A**bstraction **L**ayer crates for the **ESP32**, **ESP32-C2/C3/C6**, **ESP32-H2**, and **ESP32-S2/S3** from Espressif. Additionally provides support for programming the low-power RISC-V cores found on the **ESP32-C6** and **ESP32-S2/S3**.
+**H**ardware **A**bstraction **L**ayer crates for the **ESP32**, **ESP32-C2/C3/C6**, **ESP32-H2**, **ESP32-P4**, and **ESP32-S2/S3** from Espressif. Additionally provides support for programming the low-power RISC-V cores found on the **ESP32-C6** and **ESP32-S2/S3**.
 
 These HALs are `no_std`; if you are looking for `std` support, please use [esp-idf-hal] instead.
 
@@ -40,45 +40,49 @@ For information about the HAL and how to use it in your own projects, please ref
 
 ### High-Power Cores
 
-|     Crate     |                   Documentation                    | Technical Reference Manual |             Target             |     MSRV    |
-| :-----------: | :------------------------------------------------: | :------------------------: | :----------------------------: | :---------: |
-|  [esp32-hal]  |   [![esp32-hal-docs]](https://docs.rs/esp32-hal)   |          [ESP32]           |    `xtensa-esp32-none-elf`     |   ![esp]    |
-| [esp32c2-hal] | [![esp32c2-hal-docs]](https://docs.rs/esp32c2-hal) |         [ESP32-C2]         | `riscv32imc-unknown-none-elf`  |  ![nightly] |
-| [esp32c3-hal] | [![esp32c3-hal-docs]](https://docs.rs/esp32c3-hal) |         [ESP32-C3]         | `riscv32imc-unknown-none-elf`  |  ![nightly] |
-| [esp32c6-hal] | [![esp32c6-hal-docs]](https://docs.rs/esp32c6-hal) |         [ESP32-C6]         | `riscv32imac-unknown-none-elf` |  ![nightly] |
-| [esp32h2-hal] | [![esp32h2-hal-docs]](https://docs.rs/esp32h2-hal) |         [ESP32-H2]         | `riscv32imac-unknown-none-elf` |  ![nightly] |
-| [esp32s2-hal] | [![esp32s2-hal-docs]](https://docs.rs/esp32s2-hal) |         [ESP32-S2]         |   `xtensa-esp32s2-none-elf`    |   ![esp]    |
-| [esp32s3-hal] | [![esp32s3-hal-docs]](https://docs.rs/esp32s3-hal) |         [ESP32-S3]         |   `xtensa-esp32s3-none-elf`    |   ![esp]    |
+|     Crate     |                   Documentation                    | Technical Reference Manual |             Target              |    MSRV    |
+| :-----------: | :------------------------------------------------: | :------------------------: | :-----------------------------: | :--------: |
+|  [esp32-hal]  |   [![esp32-hal-docs]](https://docs.rs/esp32-hal)   |          [ESP32]           |     `xtensa-esp32-none-elf`     |   ![esp]   |
+| [esp32c2-hal] | [![esp32c2-hal-docs]](https://docs.rs/esp32c2-hal) |         [ESP32-C2]         |  `riscv32imc-unknown-none-elf`  | ![nightly] |
+| [esp32c3-hal] | [![esp32c3-hal-docs]](https://docs.rs/esp32c3-hal) |         [ESP32-C3]         |  `riscv32imc-unknown-none-elf`  | ![nightly] |
+| [esp32c6-hal] | [![esp32c6-hal-docs]](https://docs.rs/esp32c6-hal) |         [ESP32-C6]         | `riscv32imac-unknown-none-elf`  | ![nightly] |
+| [esp32h2-hal] | [![esp32h2-hal-docs]](https://docs.rs/esp32h2-hal) |         [ESP32-H2]         | `riscv32imac-unknown-none-elf`  | ![nightly] |
+| [esp32p4-hal] | [![esp32p4-hal-docs]](https://docs.rs/esp32p4-hal) |         [ESP32-P4]         | `riscv32imafc-unknown-none-elf` | ![nightly] |
+| [esp32s2-hal] | [![esp32s2-hal-docs]](https://docs.rs/esp32s2-hal) |         [ESP32-S2]         |    `xtensa-esp32s2-none-elf`    |   ![esp]   |
+| [esp32s3-hal] | [![esp32s3-hal-docs]](https://docs.rs/esp32s3-hal) |         [ESP32-S3]         |    `xtensa-esp32s3-none-elf`    |   ![esp]   |
 
 [esp]: https://img.shields.io/badge/rustc-esp%201.74+-red.svg
-[nightly]: https://img.shields.io/badge/rustc-nightly%202023/11/30+-red.svg 
+[nightly]: https://img.shields.io/badge/rustc-nightly%202023/11/30+-red.svg
 
 [esp32-hal]: https://github.com/esp-rs/esp-hal/tree/main/esp32-hal
 [esp32c2-hal]: https://github.com/esp-rs/esp-hal/tree/main/esp32c2-hal
 [esp32c3-hal]: https://github.com/esp-rs/esp-hal/tree/main/esp32c3-hal
 [esp32c6-hal]: https://github.com/esp-rs/esp-hal/tree/main/esp32c6-hal
 [esp32h2-hal]: https://github.com/esp-rs/esp-hal/tree/main/esp32h2-hal
+[esp32p4-hal]: https://github.com/esp-rs/esp-hal/tree/main/esp32p4-hal
 [esp32s2-hal]: https://github.com/esp-rs/esp-hal/tree/main/esp32s2-hal
 [esp32s3-hal]: https://github.com/esp-rs/esp-hal/tree/main/esp32s3-hal
 [esp32-hal-docs]: https://img.shields.io/docsrs/esp32-hal?color=C96329&logo=rust&style=flat-square
 [esp32c2-hal-docs]: https://img.shields.io/docsrs/esp32c2-hal?color=C96329&logo=rust&style=flat-square
 [esp32c3-hal-docs]: https://img.shields.io/docsrs/esp32c3-hal?color=C96329&logo=rust&style=flat-square
 [esp32c6-hal-docs]: https://img.shields.io/docsrs/esp32c6-hal?color=C96329&logo=rust&style=flat-square
 [esp32h2-hal-docs]: https://img.shields.io/docsrs/esp32h2-hal?color=C96329&logo=rust&style=flat-square
+[esp32p4-hal-docs]: https://img.shields.io/docsrs/esp32p4-hal?color=C96329&logo=rust&style=flat-square
 [esp32s2-hal-docs]: https://img.shields.io/docsrs/esp32s2-hal?color=C96329&logo=rust&style=flat-square
 [esp32s3-hal-docs]: https://img.shields.io/docsrs/esp32s3-hal?color=C96329&logo=rust&style=flat-square
 [esp32]: https://www.espressif.com/sites/default/files/documentation/esp32_technical_reference_manual_en.pdf
 [esp32-c2]: https://www.espressif.com/sites/default/files/documentation/esp8684_technical_reference_manual_en.pdf
 [esp32-c3]: https://www.espressif.com/sites/default/files/documentation/esp32-c3_technical_reference_manual_en.pdf
 [esp32-c6]: https://www.espressif.com/sites/default/files/documentation/esp32-c6_technical_reference_manual_en.pdf
 [esp32-h2]: https://www.espressif.com/sites/default/files/documentation/esp32-h2_technical_reference_manual_en.pdf
+[esp32-p4]: https://www.espressif.com/sites/default/files/documentation/esp32-p4_technical_reference_manual_en.pdf
 [esp32-s2]: https://www.espressif.com/sites/default/files/documentation/esp32-s2_technical_reference_manual_en.pdf
 [esp32-s3]: https://www.espressif.com/sites/default/files/documentation/esp32-s3_technical_reference_manual_en.pdf
 
 ### Low-Power Cores
 
-|        Crate        |       Documentation        |             Target             |
-| :-----------------: | :------------------------: | :----------------------------: |
+|        Crate        |       Documentation       |             Target             |
+| :-----------------: | :-----------------------: | :----------------------------: |
 | [esp-ulp-riscv-hal] | N/A (_Not yet published_) | `riscv32imc-unknown-none-elf`  |
 |  [esp32c6-lp-hal]   | N/A (_Not yet published_) | `riscv32imac-unknown-none-elf` |
 

diff --git a/esp-hal-common/Cargo.toml b/esp-hal-common/Cargo.toml
@@ -66,6 +66,7 @@ esp32c2 = { version = "0.17.0", features = ["critical-section"], optional = true
 esp32c3 = { version = "0.20.0", features = ["critical-section"], optional = true }
 esp32c6 = { version = "0.11.0", features = ["critical-section"], optional = true }
 esp32h2 = { version = "0.7.0",  features = ["critical-section"], optional = true }
+esp32p4 = { git = "https://github.com/esp-rs/esp-pacs", rev = "4c0dfd5", optional = true }
 esp32s2 = { version = "0.19.0", features = ["critical-section"], optional = true }
 esp32s3 = { version = "0.23.0", features = ["critical-section"], optional = true }
 
@@ -79,6 +80,7 @@ esp32c2 = ["dep:esp32c2", "riscv",  "procmacros/esp32c2", "portable-atomic/unsaf
 esp32c3 = ["dep:esp32c3", "riscv",  "procmacros/esp32c3", "portable-atomic/unsafe-assume-single-core"]
 esp32c6 = ["dep:esp32c6", "riscv",  "procmacros/esp32c6"]
 esp32h2 = ["dep:esp32h2", "riscv",  "procmacros/esp32h2"]
+esp32p4 = ["dep:esp32p4", "riscv",  "procmacros/esp32p4"]
 esp32s2 = ["dep:esp32s2", "xtensa", "procmacros/esp32s2", "xtensa-lx/esp32s2", "xtensa-lx-rt?/esp32s2", "usb-otg", "portable-atomic/critical-section"]
 esp32s3 = ["dep:esp32s3", "xtensa", "procmacros/esp32s3", "xtensa-lx/esp32s3", "xtensa-lx-rt?/esp32s3", "usb-otg"]
 
@@ -87,7 +89,7 @@ xtal-26mhz = []
 xtal-40mhz = []
 
 # Runetime support
-rt-riscv  = ["esp-riscv-rt/zero-bss", "esp32c2?/rt", "esp32c3?/rt", "esp32c6?/rt", "esp32h2?/rt"]
+rt-riscv  = ["esp-riscv-rt/zero-bss", "esp32c2?/rt", "esp32c3?/rt", "esp32c6?/rt", "esp32h2?/rt", "esp32p4?/rt"]
 rt-xtensa = ["dep:xtensa-lx-rt", "esp32?/rt", "esp32s2?/rt", "esp32s3?/rt"]
 
 # Only certain chips support flip-link (ESP32-C6 and ESPS32-H2)
@@ -167,6 +169,7 @@ debug = [
     "esp32c3?/impl-register-debug",
     "esp32c6?/impl-register-debug",
     "esp32h2?/impl-register-debug",
+    "esp32p4?/impl-register-debug",
     "esp32s2?/impl-register-debug",
     "esp32s3?/impl-register-debug",
 ]

diff --git a/esp-hal-common/build.rs b/esp-hal-common/build.rs
@@ -104,7 +104,7 @@ fn main() -> Result<(), Box<dyn Error>> {
     // NOTE: update when adding new device support!
     // Ensure that exactly one chip has been specified:
     assert_unique_used_features!(
-        "esp32", "esp32c2", "esp32c3", "esp32c6", "esp32h2", "esp32s2", "esp32s3"
+        "esp32", "esp32c2", "esp32c3", "esp32c6", "esp32h2", "esp32p4", "esp32s2", "esp32s3"
     );
 
     // Handle the features for the ESP32's and ESP32-C2's different crystal
@@ -143,6 +143,8 @@ fn main() -> Result<(), Box<dyn Error>> {
         "esp32c6"
     } else if cfg!(feature = "esp32h2") {
         "esp32h2"
+    } else if cfg!(feature = "esp32p4") {
+        "esp32p4"
     } else if cfg!(feature = "esp32s2") {
         "esp32s2"
     } else if cfg!(feature = "esp32s3") {

diff --git a/esp-hal-common/devices/esp32p4/device.toml b/esp-hal-common/devices/esp32p4/device.toml
@@ -0,0 +1,96 @@
+[device]
+arch = "riscv"
+cores = "multi_core"
+
+peripherals = [
+    # Peripherals available in the PAC:
+    # "adc",
+    # "aes",
+    # "assist_debug",
+    # "axi_dma",
+    # "axi_icm",
+    # "bitscrambler",
+    # "cache",
+    # "dma",
+    # "ds",
+    # "ecc",
+    # "ecdsa",
+    # "efuse",
+    # "gpio_sd",
+    # "gpio",
+    # "h264_dma",
+    # "h264",
+    # "hmac",
+    # "hp_sys_clkrst",
+    "hp_sys",
+    # "i2c0",
+    # "i2c1",
+    # "i2s0",
+    # "i2s1",
+    # "i2s2",
+    # "i3c_mst_mem",
+    # "i3c_mst",
+    # "i3c_slv",
+    "interrupt_core0",
+    "interrupt_core1",
+    # "io_mux",
+    # "isp",
+    # "jpeg",
+    # "lcd_cam",
+    # "ledc",
+    # "lp_adc",
+    # "lp_ana_peri",
+    # "lp_aon_clkrst",
+    # "lp_gpio",
+    # "lp_huk",
+    # "lp_i2c_ana_mst",
+    # "lp_i2c0",
+    # "lp_i2s0",
+    # "lp_intr",
+    # "lp_io_mux",
+    # "lp_peri",
+    # "lp_sys",
+    # "lp_timer",
+    # "lp_touch",
+    # "lp_tsens",
+    # "lp_uart",
+    # "lp_wdt",
+    # "mcpwm0",
+    # "mcpwm1",
+    # "mipi_csi_bridge",
+    # "mipi_csi_host",
+    # "mipi_dsi_bridge",
+    # "mipi_dsi_host",
+    # "parl_io",
+    # "pau",
+    # "pcnt",
+    # "pmu",
+    # "ppa",
+    # "pvt",
+    # "rmt",
+    # "rsa",
+    # "sdhost",
+    # "sha",
+    # "soc_etm",
+    # "spi0",
+    # "spi1",
+    # "spi2",
+    # "spi3",
+    # "systimer",
+    # "timg0",
+    # "timg1",
+    # "trace0",
+    # "trace1",
+    # "twai0",
+    # "twai1",
+    # "twai2",
+    # "uart0",
+    # "uhci0",
+    # "usb_device",
+    # "usb_wrap",
+]
+
+symbols = [
+    # Additional peripherals defined by us (the developers):
+    "plic",
+]