bugfix(usb_jtag_serial): Disable RTC watchdog to avoid resets during …

…flashing

esptool/targets/esp32c3.py

@@ -72,6 +72,14 @@ class ESP32C3ROM(ESP32ROM):
 
     FLASH_ENCRYPTED_WRITE_ALIGN = 16
 
+    UARTDEV_BUF_NO = 0x3FCDF07C  # Variable in ROM .bss which indicates the port in use
+    UARTDEV_BUF_NO_USB_JTAG_SERIAL = 3  # The above var when USB-JTAG/Serial is used
+
+    RTC_CNTL_WDT_WKEY = 0x50D83AA1
+    RTCCNTL_BASE_REG = 0x60008000
+    RTC_CNTL_WDTCONFIG0_REG = RTCCNTL_BASE_REG + 0x0090
+    RTC_CNTL_WDTWPROTECT_REG = RTCCNTL_BASE_REG + 0x00A8
+
     MEMORY_MAP = [
         [0x00000000, 0x00010000, "PADDING"],
         [0x3C000000, 0x3C800000, "DROM"],
@@ -159,6 +167,28 @@ def is_flash_encryption_key_valid(self):
     def change_baud(self, baud):
         ESPLoader.change_baud(self, baud)
 
+    def uses_usb_jtag_serial(self, _cache=[]):
+        """
+        Check the UARTDEV_BUF_NO register to see if USB-JTAG/Serial is being used
+        """
+        if self.secure_download_mode:
+            return False  # Can't detect USB-JTAG/Serial in secure download mode
+        if not _cache:
+            buf_no = self.read_reg(self.UARTDEV_BUF_NO) & 0xFF
+            _cache.append(buf_no == self.UARTDEV_BUF_NO_USB_JTAG_SERIAL)
+        return _cache[0]
+
+    def disable_rtc_watchdog(self):
+        # When USB-JTAG/Serial is used, the RTC watchdog is not reset
+        # and can then reset the board during flashing. Disable it.
+        if self.uses_usb_jtag_serial():
+            self.write_reg(self.RTC_CNTL_WDTWPROTECT_REG, self.RTC_CNTL_WDT_WKEY)
+            self.write_reg(self.RTC_CNTL_WDTCONFIG0_REG, 0)
+            self.write_reg(self.RTC_CNTL_WDTWPROTECT_REG, 0)
+
+    def _post_connect(self):
+        self.disable_rtc_watchdog()
+
 
 class ESP32C3StubLoader(ESP32C3ROM):
     """Access class for ESP32C3 stub loader, runs on top of ROM.

esptool/targets/esp32c6.py

@@ -69,6 +69,13 @@ class ESP32C6ROM(ESP32C3ROM):
 
     FLASH_ENCRYPTED_WRITE_ALIGN = 16
 
+    UARTDEV_BUF_NO = 0x4087F580  # Variable in ROM .bss which indicates the port in use
+    UARTDEV_BUF_NO_USB_JTAG_SERIAL = 3  # The above var when USB-JTAG/Serial is used
+
+    DR_REG_LP_WDT_BASE = 0x600B1C00
+    RTC_CNTL_WDTCONFIG0_REG = DR_REG_LP_WDT_BASE + 0x0  # LP_WDT_RWDT_CONFIG0_REG
+    RTC_CNTL_WDTWPROTECT_REG = DR_REG_LP_WDT_BASE + 0x0018  # LP_WDT_RWDT_WPROTECT_REG
+
     FLASH_FREQUENCY = {
         "80m": 0x0,  # workaround for wrong mspi HS div value in ROM
         "40m": 0x0,

esptool/targets/esp32c6beta.py

@@ -21,3 +21,6 @@ def get_chip_description(self):
         major_rev = self.get_major_chip_version()
         minor_rev = self.get_minor_chip_version()
         return f"{chip_name} (revision v{major_rev}.{minor_rev})"
+
+    def _post_connect(self):
+        pass

esptool/targets/esp32h2beta1.py

@@ -138,6 +138,9 @@ def is_flash_encryption_key_valid(self):
 
         return any(p == self.PURPOSE_VAL_XTS_AES128_KEY for p in purposes)
 
+    def _post_connect(self):
+        pass
+
 
 class ESP32H2BETA1StubLoader(ESP32H2BETA1ROM):
     """Access class for ESP32H2BETA1 stub loader, runs on top of ROM.

esptool/targets/esp32s3.py

@@ -80,7 +80,13 @@ class ESP32S3ROM(ESP32ROM):
     PURPOSE_VAL_XTS_AES128_KEY = 4
 
     UARTDEV_BUF_NO = 0x3FCEF14C  # Variable in ROM .bss which indicates the port in use
-    UARTDEV_BUF_NO_USB_OTG = 3  # Value of the above indicating that USB-OTG is in use
+    UARTDEV_BUF_NO_USB_OTG = 3  # The above var when USB-OTG is used
+    UARTDEV_BUF_NO_USB_JTAG_SERIAL = 4  # The above var when USB-JTAG/Serial is used
+
+    RTC_CNTL_WDT_WKEY = 0x50D83AA1
+    RTCCNTL_BASE_REG = 0x60008000
+    RTC_CNTL_WDTCONFIG0_REG = RTCCNTL_BASE_REG + 0x0090
+    RTC_CNTL_WDTWPROTECT_REG = RTCCNTL_BASE_REG + 0x00B0
 
     USB_RAM_BLOCK = 0x800  # Max block size USB-OTG is used
 
@@ -227,9 +233,29 @@ def uses_usb_otg(self, _cache=[]):
             _cache.append(buf_no == self.UARTDEV_BUF_NO_USB_OTG)
         return _cache[0]
 
+    def uses_usb_jtag_serial(self, _cache=[]):
+        """
+        Check the UARTDEV_BUF_NO register to see if USB-JTAG/Serial is being used
+        """
+        if self.secure_download_mode:
+            return False  # can't detect USB-JTAG/Serial in secure download mode
+        if not _cache:
+            buf_no = self.read_reg(self.UARTDEV_BUF_NO) & 0xFF
+            _cache.append(buf_no == self.UARTDEV_BUF_NO_USB_JTAG_SERIAL)
+        return _cache[0]
+
+    def disable_rtc_watchdog(self):
+        # When USB-JTAG/Serial is used, the RTC watchdog is not reset
+        # and can then reset the board during flashing. Disable it.
+        if self.uses_usb_jtag_serial():
+            self.write_reg(self.RTC_CNTL_WDTWPROTECT_REG, self.RTC_CNTL_WDT_WKEY)
+            self.write_reg(self.RTC_CNTL_WDTCONFIG0_REG, 0)
+            self.write_reg(self.RTC_CNTL_WDTWPROTECT_REG, 0)
+
     def _post_connect(self):
         if self.uses_usb_otg():
             self.ESP_RAM_BLOCK = self.USB_RAM_BLOCK
+        self.disable_rtc_watchdog()
 
     def _check_if_can_reset(self):
         """

esptool/targets/stub_flasher/stub_flasher_32c3.json

@@ -1,7 +1,7 @@
 {
     "entry": 1077413538,
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