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11 Open 34 Closed
11 Open 34 Closed
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Issues list

firrtl-interpreter internal structure
#148 opened Mar 2, 2019 by kai413629305
2
Bug in handling and() PrimOp with sign extension bug
#145 opened Jan 14, 2019 by chick
@chick
How to silence log output during evaluateCircuit
#141 opened Dec 4, 2018 by nhynes
"exception Expression key dcache.wen already in stack" when loading riscv-mini's Tile.fir
#127 opened Mar 29, 2018 by taomiao
1
Interpreter's reset behavior does not match verilator backend.
#118 opened Feb 27, 2018 by chick
2
Interpreter should do stronger tests for legal input values enhancement
#116 opened Feb 27, 2018 by chick
@chick
Init behavior between interpreter and verilator simulations is different. bug enhancement question
#110 opened Feb 5, 2018 by chick
@chick
1
Nobody expects the CombLoopException
#78 opened Mar 24, 2017 by ucbjrl
Peek on internal Vec or elements of Seq?
#43 opened Oct 21, 2016 by shunshou
9
Better instrumentation and rendering of that instrumentation enhancement
#17 opened Aug 4, 2016 by chick Performance Enhancements
Consider using concrete values for indices to memory enhancement
#11 opened Jul 20, 2016 by chick
ProTip! Updated in the last three days: updated:>2024-11-07.