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arch/risc-v: does not clear IPI address in S mode
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According to the riscv-aclint doc, writing 0 to SSWI address
has no effect. Remove this unnecessary write for S mode.

Link: https://github.com/riscv/riscv-aclint/blob/main/riscv-aclint.adoc

Signed-off-by: Inochi Amaoto <[email protected]>
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inochisa authored and xiaoxiang781216 committed Jul 18, 2024
1 parent 985d395 commit 0ddcbe6
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion arch/risc-v/src/common/riscv_ipi.h
Original file line number Diff line number Diff line change
Expand Up @@ -45,7 +45,7 @@ static inline void riscv_ipi_send(int cpu)

static inline void riscv_ipi_clear(int cpu)
{
#if defined(RISCV_IPI)
#if defined(RISCV_IPI) && !defined(CONFIG_ARCH_USE_S_MODE)
putreg32(0, (uintptr_t)RISCV_IPI + (4 * cpu));
#endif
CLEAR_CSR(CSR_IP, IP_SIP);
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