espressif: fix linker to include the reserved area of RTC memory

Basically, it reserves an area of the RTC memory to preserve the
RTC timer.

Please refer to:
espressif/esp-hal-3rdparty@fa76c82

This commit also removes the rtc.dummy section because C3, C6 and
H2 don't need to skip it once the region is accessed by the same
address space using the instruction and data bus.

arch/risc-v/src/espressif/Kconfig

@@ -33,6 +33,7 @@ config ESPRESSIF_ESP32C3
 	select LIBC_ARCH_STRNCPY
 	select LIBC_ARCH_STRLEN
 	select LIBC_ARCH_STRNLEN
+	select ESPRESSIF_SOC_RTC_MEM_SUPPORTED
 	---help---
 		ESP32-C3 chip with a single RISC-V IMC core, no embedded Flash memory
 
@@ -60,6 +61,7 @@ config ESPRESSIF_ESP32C6
 	select LIBC_ARCH_STRNCPY
 	select LIBC_ARCH_STRLEN
 	select LIBC_ARCH_STRNLEN
+	select ESPRESSIF_SOC_RTC_MEM_SUPPORTED
 	---help---
 		Espressif ESP32-C6 (RV32IMAC).
 
@@ -88,6 +90,7 @@ config ESPRESSIF_ESP32H2
 	select LIBC_ARCH_STRLEN
 	select LIBC_ARCH_STRNLEN
 	select ESPRESSIF_ESPTOOLPY_NO_STUB
+	select ESPRESSIF_SOC_RTC_MEM_SUPPORTED
 	---help---
 		Espressif ESP32-H2 (RV32IMC).
 
@@ -204,6 +207,10 @@ config ESPRESSIF_HAL_ASSERTIONS
 		Enable the assertions implemented in the HAL. Otherwise, the assertions
 		are replaced by empty macros.
 
+config ESPRESSIF_SOC_RTC_MEM_SUPPORTED
+	bool
+	default n
+
 menu "Peripheral Support"
 
 config ESPRESSIF_UART

boards/risc-v/espressif/common/scripts/common.ld

@@ -0,0 +1,35 @@
+/****************************************************************************
+ * boards/risc-v/espressif/common/scripts/common.ld
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+#include <nuttx/config.h>
+
+#if CONFIG_ESPRESSIF_SOC_RTC_MEM_SUPPORTED
+#  define ESP_BOOTLOADER_RESERVE_RTC 0
+
+   /* rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files).
+    * For rtc_timer_data_in_rtc_mem section.
+    */
+#  define RTC_TIMER_RESERVE_RTC (24)
+
+#  ifdef CONFIG_ARCH_CHIP_ESP32
+#    define RESERVE_RTC_MEM (RTC_TIMER_RESERVE_RTC)
+#  else
+#    define RESERVE_RTC_MEM (ESP_BOOTLOADER_RESERVE_RTC + RTC_TIMER_RESERVE_RTC)
+#  endif /* CONFIG_ARCH_CHIP_ESP32 */
+#endif /* CONFIG_ESPRESSIF_SOC_RTC_MEM_SUPPORTED */

boards/risc-v/espressif/common/scripts/esp32c3_flat_memory.ld

@@ -29,7 +29,7 @@
  *
  ****************************************************************************/
 
-#include <nuttx/config.h>
+#include "common.ld"
 
 #define SRAM_IRAM_START     0x4037c000
 #define SRAM_DRAM_START     0x3fc7c000
@@ -84,19 +84,32 @@ MEMORY
 
   drom0_0_seg (R) :      org = 0x3c000020, len = 0x800000 - 0x20
 
-  /* RTC fast memory. Persists over deep sleep. */
+  /* RTC fast memory (executable). Persists over deep sleep. */
 
-  rtc_seg(RWX) :          org = 0x50000000, len = 0x2000
+  rtc_iram_seg(RWX) :    org = 0x50000000, len = 0x2000 - RESERVE_RTC_MEM
+
+  /* We reduced the size of rtc_iram_seg by RESERVE_RTC_MEM value.
+   * It reserves the amount of RTC fast memory that we use for this memory segment.
+   * This segment is intended for keeping:
+   *   - (lower addr) rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files).
+   *   - (higher addr) bootloader rtc data (s_bootloader_retain_mem, when a Kconfig option is on).
+   * The aim of this is to keep data that will not be moved around and have a fixed address.
+   */
+  rtc_reserved_seg(RW) : org = 0x50000000 + 0x2000 - RESERVE_RTC_MEM, len = RESERVE_RTC_MEM
 }
 
+/*  The lines below define location alias for .rtc.data section
+ *  As C3 only has RTC fast memory, this is not configurable like on other targets
+ */
+
+REGION_ALIAS("rtc_data_seg", rtc_iram_seg );
+REGION_ALIAS("rtc_slow_seg", rtc_iram_seg );
+REGION_ALIAS("rtc_data_location", rtc_iram_seg );
+
 #if CONFIG_ESPRESSIF_RUN_IRAM
   REGION_ALIAS("default_rodata_seg", dram0_0_seg);
   REGION_ALIAS("default_code_seg", iram0_0_seg);
 #else
   REGION_ALIAS("default_rodata_seg", drom0_0_seg);
   REGION_ALIAS("default_code_seg", irom0_0_seg);
 #endif /* CONFIG_ESPRESSIF_RUN_IRAM */
-
-/* Mark the end of the RTC heap (top of the RTC region) */
-
-_ertcheap = 0x50001fff;

boards/risc-v/espressif/common/scripts/esp32c3_legacy_sections.ld

@@ -255,35 +255,42 @@ SECTIONS
   {
     . = ALIGN(4);
     *(.rtc.literal .rtc.text)
-  } >rtc_seg
-
-  /* This section is required to skip rtc.text area because the text and
-   * data segments reflect the same address space on different buses.
-   */
-
-  .rtc.dummy :
-  {
-    . = SIZEOF(.rtc.text);
-  } >rtc_seg
+  } >rtc_iram_seg
 
   /* RTC BSS section. */
 
   .rtc.bss (NOLOAD) :
   {
     *(.rtc.bss)
-  } >rtc_seg
+  } >rtc_iram_seg
 
   /* RTC data section holds RTC wake stub data/rodata. */
 
   .rtc.data :
   {
     *(.rtc.data)
     *(.rtc.rodata)
+  } >rtc_iram_seg
+
+  /* This section holds RTC data that should have fixed addresses.
+   * The data are not initialized at power-up and are retained during deep sleep.
+   */
+  .rtc_reserved (NOLOAD):
+  {
+    . = ALIGN(4);
+    _rtc_reserved_start = ABSOLUTE(.);
+    /* New data can only be added here to ensure existing data are not moved.
+       Because data have adhered to the end of the segment and code is relied on it.
+       >> put new data here << */
 
-   /* Whatever is left from the RTC memory is used as a special heap. */
+    *(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*)
+    KEEP(*(.bootloader_data_rtc_mem .bootloader_data_rtc_mem.*))
+    _rtc_reserved_end = ABSOLUTE(.);
+  } > rtc_reserved_seg
 
-    _srtcheap = ABSOLUTE(.);
+  _rtc_reserved_length = _rtc_reserved_end - _rtc_reserved_start;
+  ASSERT((_rtc_reserved_length <= LENGTH(rtc_reserved_seg)),
+          "RTC reserved segment data does not fit.")
 
-  } >rtc_seg
 }
 

boards/risc-v/espressif/common/scripts/esp32c6_flat_memory.ld

@@ -29,7 +29,7 @@
  *
  ****************************************************************************/
 
-#include <nuttx/config.h>
+#include "common.ld"
 
 #define SRAM_IRAM_START       0x40800000
 #define SRAM_DRAM_START       0x40800000
@@ -93,7 +93,17 @@ MEMORY
 
   /* RTC fast memory (executable). Persists over deep sleep. */
 
-  lp_ram_seg  (RWX) :     org = 0x50000000, len = 0x4000
+  lp_ram_seg  (RWX) :     org = 0x50000000, len = 0x4000 - RESERVE_RTC_MEM
+
+  /* We reduced the size of lp_ram_seg by RESERVE_RTC_MEM value.
+   * It reserves the amount of LP memory that we use for this memory segment.
+   * This segment is intended for keeping:
+   *   - (lower addr) rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files).
+   *   - (higher addr) bootloader rtc data (s_bootloader_retain_mem, when a Kconfig option is on).
+   * The aim of this is to keep data that will not be moved around and have a fixed address.
+   */
+
+  lp_reserved_seg (RW):   org = 0x50000000 + 0x4000 - RESERVE_RTC_MEM, len = RESERVE_RTC_MEM
 }
 
 /* The lines below define location alias for .rtc.data section
@@ -106,6 +116,7 @@ REGION_ALIAS("rtc_iram_seg", lp_ram_seg);
 REGION_ALIAS("rtc_data_seg", rtc_iram_seg);
 REGION_ALIAS("rtc_slow_seg", rtc_iram_seg);
 REGION_ALIAS("rtc_data_location", rtc_iram_seg);
+REGION_ALIAS("rtc_reserved_seg", lp_reserved_seg );
 
 #if CONFIG_ESPRESSIF_RUN_IRAM
   REGION_ALIAS("default_rodata_seg", dram0_0_seg);

boards/risc-v/espressif/common/scripts/esp32c6_legacy_sections.ld

@@ -260,21 +260,31 @@ SECTIONS
     *(.rtc.literal .rtc.text)
   } >lp_ram_seg
 
-  /* This section is required to skip rtc.text area because the text and
-   * data segements reflect the same address space on different buses.
-   */
-
-  .rtc.dummy :
-  {
-    . = SIZEOF(.rtc.text);
-  } >lp_ram_seg
-
   /* RTC data section holds RTC wake stub data/rodata. */
 
   .rtc.data :
   {
     *(.rtc.data)
     *(.rtc.rodata)
   } >lp_ram_seg
-}
 
+  /* This section holds RTC data that should have fixed addresses.
+   * The data are not initialized at power-up and are retained during deep sleep.
+   */
+  .rtc_reserved (NOLOAD):
+  {
+    . = ALIGN(4);
+    _rtc_reserved_start = ABSOLUTE(.);
+    /* New data can only be added here to ensure existing data are not moved.
+       Because data have adhered to the end of the segment and code is relied on it.
+       >> put new data here << */
+
+    *(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*)
+    KEEP(*(.bootloader_data_rtc_mem .bootloader_data_rtc_mem.*))
+    _rtc_reserved_end = ABSOLUTE(.);
+  } > rtc_reserved_seg
+
+  _rtc_reserved_length = _rtc_reserved_end - _rtc_reserved_start;
+  ASSERT((_rtc_reserved_length <= LENGTH(rtc_reserved_seg)),
+          "RTC reserved segment data does not fit.")
+}

boards/risc-v/espressif/common/scripts/esp32h2_flat_memory.ld

@@ -29,7 +29,7 @@
  *
  ****************************************************************************/
 
-#include <nuttx/config.h>
+#include "common.ld"
 
 #define SRAM_IRAM_START       0x40800000
 #define SRAM_DRAM_START       0x40800000
@@ -93,7 +93,16 @@ MEMORY
 
   /* RTC fast memory (executable). Persists over deep sleep. */
 
-  lp_ram_seg  (RWX) :     org = 0x50000000, len = 0x1000
+  lp_ram_seg (RWX) :      org = 0x50000000, len = 0x1000 - RESERVE_RTC_MEM
+
+  /* We reduced the size of lp_ram_seg by RESERVE_RTC_MEM value.
+   * It reserves the amount of LP memory that we use for this memory segment.
+   * This segment is intended for keeping:
+   *   - (lower addr) rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files).
+   *   - (higher addr) bootloader rtc data (s_bootloader_retain_mem, when a Kconfig option is on).
+   * The aim of this is to keep data that will not be moved around and have a fixed address.
+   */
+  lp_reserved_seg (RW) :  org = 0x50000000 + 0x1000 - RESERVE_RTC_MEM, len = RESERVE_RTC_MEM
 }
 
 /* The lines below define location alias for .rtc.data section
@@ -106,6 +115,7 @@ REGION_ALIAS("rtc_iram_seg", lp_ram_seg);
 REGION_ALIAS("rtc_data_seg", rtc_iram_seg);
 REGION_ALIAS("rtc_slow_seg", rtc_iram_seg);
 REGION_ALIAS("rtc_data_location", rtc_iram_seg);
+REGION_ALIAS("rtc_reserved_seg", lp_reserved_seg );
 
 #if CONFIG_ESPRESSIF_RUN_IRAM
   REGION_ALIAS("default_rodata_seg", dram0_0_seg);

boards/risc-v/espressif/common/scripts/esp32h2_legacy_sections.ld

@@ -260,21 +260,33 @@ SECTIONS
     *(.rtc.literal .rtc.text)
   } >lp_ram_seg
 
-  /* This section is required to skip rtc.text area because the text and
-   * data segements reflect the same address space on different buses.
-   */
-
-  .rtc.dummy :
-  {
-    . = SIZEOF(.rtc.text);
-  } >lp_ram_seg
-
   /* RTC data section holds RTC wake stub data/rodata. */
 
   .rtc.data :
   {
     *(.rtc.data)
     *(.rtc.rodata)
   } >lp_ram_seg
+
+  /* This section holds RTC data that should have fixed addresses.
+   * The data are not initialized at power-up and are retained during deep sleep.
+   */
+  .rtc_reserved (NOLOAD):
+  {
+    . = ALIGN(4);
+    _rtc_reserved_start = ABSOLUTE(.);
+    /* New data can only be added here to ensure existing data are not moved.
+       Because data have adhered to the end of the segment and code is relied on it.
+       >> put new data here << */
+
+    *(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*)
+    KEEP(*(.bootloader_data_rtc_mem .bootloader_data_rtc_mem.*))
+    _rtc_reserved_end = ABSOLUTE(.);
+  } > rtc_reserved_seg
+
+  _rtc_reserved_length = _rtc_reserved_end - _rtc_reserved_start;
+  ASSERT((_rtc_reserved_length <= LENGTH(rtc_reserved_seg)),
+          "RTC reserved segment data does not fit.")
+
 }