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compile error due to unhoisted stack alloc with fused generics + data-tiled matmul #14406

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bjacob opened this issue Jul 14, 2023 · 2 comments · Fixed by #14408
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compile error due to unhoisted stack alloc with fused generics + data-tiled matmul #14406

bjacob opened this issue Jul 14, 2023 · 2 comments · Fixed by #14408
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bug 🐞 Something isn't working codegen/llvm LLVM code generation compiler backend

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@bjacob
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bjacob commented Jul 14, 2023

Minimized from #14398 (comment) .

This is with #14349 applied.

Minimized failing testcase: fails.mlir.

Dropping one more op makes it work: works.mlir.

Succeeding command line (works.mlir):

$ tools/iree-compile /tmp/works.mlir --iree-hal-target-backends=llvm-cpu --iree-llvmcpu-target-cpu-features=+avx,+avx2,+fma --iree-llvmcpu-target-cpu=haswell --iree-llvmcpu-stack-allocation-limit=140000 --iree-util-zero-fill-elided-attrs -o /tmp/a.vmfb --iree-flow-enable-data-tiling --iree-llvmcpu-enable-microkernels --mlir-print-op-on-diagnostic=false

Failing command line (fails.mlir):

$ tools/iree-compile /tmp/fails.mlir --iree-hal-target-backends=llvm-cpu --iree-llvmcpu-target-cpu-features=+avx,+avx2,+fma --iree-llvmcpu-target-cpu=haswell --iree-llvmcpu-stack-allocation-limit=140000 --iree-util-zero-fill-elided-attrs -o /tmp/a.vmfb --iree-flow-enable-data-tiling --iree-llvmcpu-enable-microkernels --mlir-print-op-on-diagnostic=false
/tmp/fails.mlir:26:11: error: 'memref.alloca' op all stack allocations need to be hoisted to the entry block of the function
    %52 = linalg.generic {indexing_maps = [#map1, #map14], iterator_types = ["parallel", "parallel", "reduction"]} ins(%38 : tensor<1x8x2048xf32>) outs(%51 : tensor<1x8x1xf32>) {

Diff between works.mlir and fails.mlir:

--- /tmp/works.mlir     2023-07-14 16:50:05.154793943 +0000
+++ /tmp/fails.mlir     2023-07-14 16:50:21.526778081 +0000
@@ -11,8 +11,7 @@
                      %arg1: tensor<1x8xi64>,
                      %48 : tensor<1x8x1xf64>,
                      %38 : tensor<1x8x2048xf32>,
-                     %50 : tensor<1x8x1xf32>,
-                     %52 : tensor<1x8x1xf32>
+                     %50 : tensor<1x8x1xf32>
                     ) -> tensor<8x2048xf32> {
     %cst = arith.constant dense_resource<__elided__> : tensor<2048xf32>
     %cst_335 = arith.constant dense_resource<__elided__> : tensor<2048x2048xf32>
@@ -24,6 +23,11 @@
     %0 = tensor.empty() : tensor<1x8x2048xf32>
     %49 = tensor.empty() : tensor<1x8x1xf32>
     %51 = linalg.fill ins(%cst_340 : f32) outs(%49 : tensor<1x8x1xf32>) -> tensor<1x8x1xf32>
+    %52 = linalg.generic {indexing_maps = [#map1, #map14], iterator_types = ["parallel", "parallel", "reduction"]} ins(%38 : tensor<1x8x2048xf32>) outs(%51 : tensor<1x8x1xf32>) {
+    ^bb0(%in: f32, %out: f32):
+      %1818 = arith.addf %in, %out : f32
+      linalg.yield %1818 : f32
+    } -> tensor<1x8x1xf32>
     %53 = linalg.generic {indexing_maps = [#map15, #map1], iterator_types = ["parallel", "parallel", "parallel"]} ins(%52 : tensor<1x8x1xf32>) outs(%49 : tensor<1x8x1xf32>) {
     ^bb0(%in: f32, %out: f32):
       %1818 = arith.divf %in, %cst_347 : f32
@bjacob bjacob added bug 🐞 Something isn't working codegen/llvm LLVM code generation compiler backend labels Jul 14, 2023
@bjacob
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bjacob commented Jul 14, 2023

@hanhanW hanhanW self-assigned this Jul 14, 2023
hanhanW added a commit that referenced this issue Jul 14, 2023
…#14408)

The patterns are expected to be used right after distribution. User should call them explicitly, not including them in the pass.

Fixes #14406
@bjacob
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bjacob commented Jul 15, 2023

Thanks @hanhanW ! Also pushed an update to #14349 that makes it no longer trigger this.

nhasabni pushed a commit to plaidml/iree that referenced this issue Aug 24, 2023
…iree-org#14408)

The patterns are expected to be used right after distribution. User should call them explicitly, not including them in the pass.

Fixes iree-org#14406
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