Fix ADRP instruction encoding (#396)

* Fix ADRP instruction encoding * Trigger checks on PR again, it failed for some reason unrelated to my code * Add correct offset checks back in
keystone-engine · Jan 21, 2019 · 622fe09 · 622fe09
1 parent 3ecb98c
commit 622fe09
Show file tree

Hide file tree

Showing 2 changed files with 4 additions and 3 deletions.
diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -1133,10 +1133,11 @@ class AArch64Operand : public MCParsedAsmOperand {
         return false;
 
     if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(Imm.Val)) {
-      int64_t Val = CE->getValue() - Ctx.getBaseAddress();
+      int64_t Val = CE->getValue();
+      int64_t Offset = Val - Ctx.getBaseAddress();
       int64_t Min = - (4096 * (1LL << (21 - 1)));
       int64_t Max = 4096 * ((1LL << (21 - 1)) - 1);
-      return (Val % 4096) == 0 && Val >= Min && Val <= Max;
+      return (Val % 4096) == 0 && Offset >= Min && Offset <= Max;
     }
 
     return true;

diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
@@ -219,7 +219,7 @@ AArch64MCCodeEmitter::getAdrLabelOpValue(const MCInst &MI, unsigned OpIdx,
 
   // If the destination is an immediate, we have nothing to do.
   if (MO.isImm())
-      return (MO.getImm() * 4096 - MI.getAddress()) / 4096;
+      return MO.getImm() - (MI.getAddress() >> 12);
   assert(MO.isExpr() && "Unexpected target type!");
   const MCExpr *Expr = MO.getExpr();