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Added Block Partitioning
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kir486680 committed Nov 21, 2023
1 parent f6763af commit 54f4dc0
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Showing 5 changed files with 74 additions and 18 deletions.
13 changes: 9 additions & 4 deletions src/define.v
Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,12 @@
`define EXP_MAX 2**(`EXP_W-1)+2**(`EXP_W)-3
`define PE_W 3
`define PE_H 3
`define A_M 2
`define A_P 5
`define B_P 5
`define B_N 2


`define DATA_W 16
`define A_M 2 // dimension 0 of A matrix
`define A_P 5 // dimension 1 of A matrix
`define B_P 5 // dimension 0 of B matrix
`define B_N 2 // dimension 1 of B matrix
`define J 2 //row max dim of the systolic mlutiplier
`define K 2 //col max dim of the systolic mlutiplier
5 changes: 3 additions & 2 deletions tests/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -4,6 +4,7 @@ SIM ?= icarus

# Verilog source files
VERILOG_SOURCES = ../src/define.v \
../src/get_block.v\
../src/block_multiply.v \
../src/fadd.v \
../src/fmul.v \
Expand All @@ -12,8 +13,8 @@ VERILOG_SOURCES = ../src/define.v \

# You will have to create separate test rules for each module
TOPLEVEL_LANG = verilog
TOPLEVEL = block_multiply
MODULE = test_block_multiply
TOPLEVEL = get_block
MODULE = test_get_block


include $(shell cocotb-config --makefiles)/Makefile.sim
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19 changes: 7 additions & 12 deletions tests/test_block_multiply.py
Original file line number Diff line number Diff line change
@@ -1,14 +1,9 @@
import cocotb
import numpy as np
from cocotb.triggers import RisingEdge, Timer
from cocotb.clock import Clock
from cocotb.binary import BinaryValue
from utils import float_to_float16

def float_to_float16(value):
# Convert Python float to numpy float16
float16 = np.float16(value)
# Convert to binary string and strip the '0b' prefix
return format(np.float16(float16).view(np.uint16), '016b')

@cocotb.test()
async def systolic_array_test(dut):
Expand All @@ -21,8 +16,8 @@ async def systolic_array_test(dut):
dut.rst.value = 1
dut.start.value = 0
dut.load_enable.value = 0
dut.inp_a.value = BinaryValue(value=0, bits=16)
dut.inp_b.value = BinaryValue(value=0, bits=16)
dut.inp_a.value = BinaryValue(value=0, n_bits=16)
dut.inp_b.value = BinaryValue(value=0, n_bits=16)
await RisingEdge(dut.clk)
dut.rst.value = 0

Expand All @@ -33,15 +28,15 @@ async def systolic_array_test(dut):

for i in range(10):
dut.load_enable.value = 1
dut.inp_a.value = BinaryValue(value=float_to_float16(i), bits=16)
dut.inp_b.value = BinaryValue(value=float_to_float16(i), bits=16)
dut.inp_a.value = BinaryValue(value=float_to_float16(i), n_bits=16)
dut.inp_b.value = BinaryValue(value=float_to_float16(i), n_bits=16)
await RisingEdge(dut.clk)
await RisingEdge(dut.clk)
buffer_A_contents = [dut.buffer_A[i].value for i in range(10)] # should be 0-9
buffer_B_contents = [dut.buffer_B[i].value for i in range(10)]

assert buffer_A_contents == [BinaryValue(value=float_to_float16(i), bits=16) for i in range(10)]
assert buffer_B_contents == [BinaryValue(value=float_to_float16(i), bits=16) for i in range(10)]
assert buffer_A_contents == [BinaryValue(value=float_to_float16(i), n_bits=16) for i in range(10)]
assert buffer_B_contents == [BinaryValue(value=float_to_float16(i), n_bits=16) for i in range(10)]

print("Contents of buffer_A:", buffer_A_contents)
print("Contents of buffer_B:", buffer_B_contents)
48 changes: 48 additions & 0 deletions tests/test_get_block.py
Original file line number Diff line number Diff line change
@@ -0,0 +1,48 @@
import cocotb
from cocotb.triggers import RisingEdge
from cocotb.binary import BinaryValue
from utils import float_to_float16
from cocotb.clock import Clock
@cocotb.test()
async def test_get_block(dut):
# Set up the initial conditions
clock = Clock(dut.clk, 20, units="ns") # 50 MHz clock
cocotb.fork(clock.start())
buffer_size = 15
J = 2
K= 2
dut.rst.value = 1
await RisingEdge(dut.clk)

dut.rst.value = 0
await RisingEdge(dut.clk)
for i in range(J):
for j in range(K):
print(dut.block[i * J + j].value)
# # Initialize the buffer with sequential values
for i in range(buffer_size):
dut.buffer[i].value = BinaryValue(value=float_to_float16(i), n_bits=16)
print("Initialized data")
# Define the start row and column for the block to be read
start_row = 0
start_col = 0
num_col = 2
dut.start_row.value = start_row
dut.start_col.value = start_col
dut.num_cols.value = num_col
#this is important. Need to wait for two clock cycles before reading the block. If only use one, the result gonna be xxxxx..
await RisingEdge(dut.clk)
await RisingEdge(dut.clk)
#lets not print the data in the buffer
for i in range(buffer_size):
print(dut.buffer[i].value)

# Check the block values
for i in range(J):
for j in range(K):
original_val_idx = (start_row + i) * num_col + start_col + j
original_val = dut.buffer[original_val_idx].value
block_val_idx = i * K + j
block_val = dut.block[block_val_idx].value
assert block_val == original_val
print(dut.block[i * J + j].value)
7 changes: 7 additions & 0 deletions tests/utils.py
Original file line number Diff line number Diff line change
@@ -0,0 +1,7 @@
import numpy as np

def float_to_float16(value):
# Convert Python float to numpy float16
float16 = np.float16(value)
# Convert to binary string and strip the '0b' prefix
return format(np.float16(float16).view(np.uint16), '016b')

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