orangecrab: defaults to USB-ACM UART.

litex-hub · Jan 8, 2021 · ae5494d · ae5494d
1 parent c6e7512
commit ae5494d
Showing 1 changed file with 3 additions and 4 deletions.
diff --git a/litex_boards/targets/orangecrab.py b/litex_boards/targets/orangecrab.py
@@ -150,12 +150,11 @@ def __init__(self, revision="0.2", device="25F", sdram_device="MT41K64M16",
         platform = orangecrab.Platform(revision=revision, device=device ,toolchain=toolchain)
 
         # Serial -----------------------------------------------------------------------------------
-        if kwargs["uart_name"] == "usb_acm":
-            # FIXME: do proper install of ValentyUSB.
+        if kwargs["uart_name"] in ["serial", "usb_acm"]:
+            kwargs["uart_name"] = "usb_acm"
+            # Defaults to USB ACM through ValentyUSB.
             os.system("git clone https://github.com/litex-hub/valentyusb -b hw_cdc_eptri")
             sys.path.append("valentyusb")
-        else:
-            platform.add_extension(orangecrab.feather_serial)
 
         # SoCCore ----------------------------------------------------------------------------------
         SoCCore.__init__(self, platform, sys_clk_freq,