Commits on Oct 16, 2024

1. [RISCV] Inline Assembly: RVC constraint and N modifier …

   This change implements support for the `cr` and `cf` register
   constraints (which allocate a RVC GPR or RVC FPR respectively), and the
   `N` modifier (which prints the raw encoding of a register rather than the
   name).
   
   The intention behind these additions is to make it easier to use inline
   assembly when assembling raw instructions that are not supported by the
   compiler, for instance when experimenting with new instructions or when
   supporting proprietary extensions outside the toolchain.
   
   These implement part of my proposal in riscv-non-isa/riscv-c-api-doc#92
   
   As part of the implementation, I felt there was not enough coverage of
   inline assembly and the "in X" floating-point extensions, so I have
   added more regression tests around these configurations.

   

   lenary committed Oct 16, 2024
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