coraz7: fix _connectors

m-labs · Dec 24, 2020 · 64e79e7 · 64e79e7
1 parent 9a37a58
commit 64e79e7
Showing 1 changed file with 7 additions and 20 deletions.
diff --git a/migen/build/platforms/coraz7.py b/migen/build/platforms/coraz7.py
@@ -13,26 +13,13 @@
 
     ("user_btn", 0, Pins("D20"), IOStandard("LVCMOS33")),
     ("user_btn", 1, Pins("D19"), IOStandard("LVCMOS33")),
+]
 
-    # A
-    ("pmod", 0, Pins("Y18 Y19 Y16 Y17 U18 U19 W18 W19"), IOStandard("LVCMOS33")),
-    # B
-    ("pmod", 1, Pins("W14 Y14 T11 T10 V16 W16 V12 W13"), IOStandard("LVCMOS33")),
-
-    ("crypto_sda", 0, Pins("J15"), IOStandard("LVCMOS33")),
-
-    ("user_dio", 1, Pins("L19"), IOStandard("LVCMOS33")),
-    ("user_dio", 2, Pins("M19"), IOStandard("LVCMOS33")),
-    ("user_dio", 3, Pins("N20"), IOStandard("LVCMOS33")),
-    ("user_dio", 4, Pins("P20"), IOStandard("LVCMOS33")),
-    ("user_dio", 5, Pins("P19"), IOStandard("LVCMOS33")),
-    ("user_dio", 6, Pins("R19"), IOStandard("LVCMOS33")),
-    ("user_dio", 7, Pins("T20"), IOStandard("LVCMOS33")),
-    ("user_dio", 8, Pins("T19"), IOStandard("LVCMOS33")),
-    ("user_dio", 9, Pins("U20"), IOStandard("LVCMOS33")),
-    ("user_dio", 10, Pins("V20"), IOStandard("LVCMOS33")),
-    ("user_dio", 11, Pins("W20"), IOStandard("LVCMOS33")),
-    ("user_dio", 12, Pins("K19"), IOStandard("LVCMOS33")),
+_connectors = [
+    ("pmoda", "Y18 Y19 Y16 Y17 U18 U19 W18 W19"),
+    ("pmodb", "W14 Y14 T11 T10 V16 W16 V12 W13"),
+    ("crypto_sda", "J15"),
+    ("user_dio", "L19 M19 N20 P20 P19 R19 T20 T19 U20 V20 W20 K19"),
 ]
 
 DEVICE_VARIANTS = {
@@ -47,4 +34,4 @@ class Platform(XilinxPlatform):
 
     def __init__(self, device_variant="10"):
         device = DEVICE_VARIANTS[device_variant]
-        XilinxPlatform.__init__(self, device, _io, toolchain="vivado")
+        XilinxPlatform.__init__(self, device, _io, _connectors, toolchain="vivado")