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Björn edited this page Aug 4, 2022 · 3 revisions

Using OpenOCD with the MC13224

OpenOCD

Versions of OpenOCD past v0.3 work great with FT2232 and Jlink debuggers. As of Feb. 28, 2010, OpenOCD includes configuration files for the mc13224v and for the Redbee econotag and usbstick. v0.5.0 will be the first released version to have these config. files.

If your version of OpenOCD does not have these config. files then try this one:openocd.cfg and run openocd:

$ openocd

If you do have a version of OpenOCD that includes these files you use

source [find target/mc13224v.cfg]

in your configuration. You need to set up your JTAG interface as normal --- see the OpenOCD documentation for information about how to do that.

if you have an Redbee Econotag or usbstick, you can run openocd without a configuration file like this:

$ openocd -f interface/ftdi/redbee-econotag.cfg -f board/redbee.cfg
$ openocd -f interface/ftdi/redbee-usb.cfg -f board/redbee.cfg

When OpenOCD runs successfully you should get something like:

Open On-Chip Debugger 0.4.0-rc1-dev-00143-g4960c90 (2010-01-22-19:26)
For bug reports, read
        http://openocd.berlios.de/doc/doxygen/bugs.html
srst_only separate srst_gates_jtag srst_open_drain
jtag_ntrst_delay: 200
2000 kHz
Info : max TCK change to: 30000 kHz
Info : clock speed 2000 kHz
Info : JTAG tap: mc13224.cpu tap/device found: 0x1f1f001d (mfg: 0x00e, part: 0xf1f0, ver: 0x1)
Info : Embedded ICE version 7
Error: EmbeddedICE v7 handling might be broken
Info : mc13224.cpu: hardware has 2 breakpoints or watchpoints

Load and execute an image:

$ telnet localhost 4444
> soft_reset_halt

requesting target halt and executing a soft reset
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x000000d3 pc: 0x00000000

> load_image /tmp/rftest-tx.bin 0x00400000

10376 bytes written at address 0x00400000
downloaded 10376 bytes in 0.569674s (17.787 kb/s)

> resume 0x00400000

You can also do these commands using the "run filename" using the procedure defined in the openocd.cfg:

proc run {file} {
     puts "loading $file into location 0x00400000 and executing..."
     soft_reset_halt
     mww 0x80020010 0
     load_image $file 0x00400000
     resume 0x00400000
}

Over JTAG, you can use unbrick.bin to clobber the first two bytes of NVM: invalidating any image that resides there. This is a good way to 'erase' a flashed image if you do not have access to VREFH2 and VREFL2. (Or if you've flashed a program that sleeps right away and so a VREF erase doesn't work --- and yes, this appears to be possible.)

GDB

The following macros are useful to define in ~/.gdbinit:

define go
monitor soft_reset_halt
set *0x80020010 = 0
load
monitor reg pc 0x00400000
end

define conn
target remote localhost:3333
end

0x80020010=0 disables interrupts

Whether loading an image with openocd or GDB, it can be first necessary to disable interrupts. Consider that the previous program may have set up an interrupt source (e.g. a periodic timer interrupt). And since soft_reset_halt is not a complete reset, that hardware is still running and still generating interrupts. Your new code may not even have a handler for the interrupt!

Both of the macros above disable interrupts before loading and executing the image by setting 0x80020010 to 0.

This page is maintained by Mariano Alvira. Please email me at [email protected] with patches, suggestions and comments.

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