feat: Add new AOT mode to replace experimental JIT mode #72
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I have reviewed the compilation framework and the most op compilation functions. However, I'm not familiar with X86 and RISC-V instruction set, it is hard for me to verify all the ops are compiled into correct X86 ASM. I think we should run the AOT'd code against RISC-V test suites, is this already set up?
src/machine/aot/emitter.rs
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| ) -> c_int; | ||
| fn aot_and(c: *mut AotContext, target: u32, a: AotValue, b: AotValue) -> c_int; | ||
| fn aot_or(c: *mut AotContext, target: u32, a: AotValue, b: AotValue) -> c_int; | ||
| fn aot_not(c: *mut AotContext, target: u32, a: AotValue, is_signed: c_int) -> c_int; |
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| fn aot_not(c: *mut AotContext, target: u32, a: AotValue, is_signed: c_int) -> c_int; | |
| fn aot_not(c: *mut AotContext, target: u32, a: AotValue, logical: c_int) -> c_int; |
Yes I've actually written the test suite code out and have it all passed locally, but I haven't pushed it to the test suite repo since as soon as I pushed it, it would invalidate all other PRs in this repo. So the idea is once we merge this PR, I will add the missing test suite related code, then we should be all good. Thoughts? |
lgtm |
This PR adds a new AOT mode evolved from previously experimental JIT mode. It works by compiling a RISC-V program directly into x64 assemblies. After that, most of the code can just run in the compiled x64 assembly binary without any overhead.
Benchmark shows that this can further bump VM performance from 6ms measured in assembly interpreter to ~1.5ms(of which ~0.9ms is the actual running time).
With this new AOT mode, we are also removing our old JIT mode which serves its purpose.