🔖 Release 0.6.0

openhwgroup · Jul 4, 2019 · b7ca052 · b7ca052
2 parents 3f98ba3 + 80b7ef4
commit b7ca052
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diff --git a/Bender.yml b/Bender.yml
@@ -3,8 +3,8 @@ package:
   authors: ["Stefan Mach <[email protected]>"]
 
 dependencies:
-  common_cells: {git: "https://github.com/pulp-platform/common_cells.git",         version: v1.13.1}
-  fpu_div_sqrt_mvp: {git: "https://github.com/pulp-platform/fpu_div_sqrt_mvp.git", version: v1.0.1}
+  common_cells: {git: "https://github.com/pulp-platform/common_cells.git",         version: 1.13.1}
+  fpu_div_sqrt_mvp: {git: "https://github.com/pulp-platform/fpu_div_sqrt_mvp.git", version: 1.0.3}
 
 sources:
   - src/fpnew_pkg.sv
@@ -17,9 +17,5 @@ sources:
   - src/fpnew_opgroup_block.sv
   - src/fpnew_opgroup_fmt_slice.sv
   - src/fpnew_opgroup_multifmt_slice.sv
-  - src/fpnew_pipe_in.sv
-  - src/fpnew_pipe_out.sv
-  - src/fpnew_pipe_inside_fma.sv
-  - src/fpnew_pipe_inside_cast.sv
   - src/fpnew_rounding.sv
   - src/fpnew_top.sv
diff --git a/docs/CHANGELOG.md b/docs/CHANGELOG.md
@@ -14,6 +14,25 @@ Versions of the IP in the same major relase are "pin-compatible" with each other
 ### Changed
 ### Fixed
 
+## [0.6.0] - 2019-07-04
+
+### Changed
+- Pipelines are generated in the datapath modules instead of separate instances
+
+### Fixed
+- Don't care assignments to structs have been expanded for better tool support [(#14)](https://github.com/pulp-platform/fpnew/pull/14)
+- Undriven busy signal in output pipeline bypass
+- Typo in the documentation about the multiply operation
+- Generation of merged slices when the first package format is disabled
+- Potential simulation/synthesis mismatch of the UF flag
+- Various linter warnings
+- Documentation to reflect on updated pipeline distribution order
+- [fpu_div_sqrt_mvp] Bumped to fix linter warnings
+- [Bender] Fixed dependencies for Bender [(#14)](https://github.com/pulp-platform/fpnew/pull/15)
+
+### Removed
+- Currently unused modules: `fpnew_pipe*`, `fpnew_{f2i,f2f,i2f}_cast`
+
 
 ## [0.5.6] - 2019-06-12
 
@@ -28,7 +47,7 @@ Versions of the IP in the same major relase are "pin-compatible" with each other
 ## [0.5.5] - 2019-06-02
 
 ### Fixed
-- UF flag handling according to IEEE754-2008 (#11)
+- UF flag handling according to IEEE754-2008 [(#11)](https://github.com/pulp-platform/fpnew/issues/11)
 
 
 ## [0.5.4] - 2019-06-02

diff --git a/docs/README.md b/docs/README.md
@@ -100,7 +100,7 @@ Unless noted otherwise, the first operand `op[0]` is used for the operation.
 | `FNMSUB`   | `1`      | Negated fused multiply-add (`-(op[0] * op[1]) - op[2]`)                                                                                                                                                          |
 | `ADD`      | `0`      | Addition (`op[1] + op[2]`) *note the operand indices*                                                                                                                                                            |
 | `ADD`      | `1`      | Subtraction (`op[1] - op[2]`) *note the operand indices*                                                                                                                                                         |
-| `MUL`      | `0`      | Multiplication (`op[0] - op[1]`)                                                                                                                                                                                 |
+| `MUL`      | `0`      | Multiplication (`op[0] * op[1]`)                                                                                                                                                                                 |
 | `DIV`      | `0`      | Division (`op[0] / op[1]`)                                                                                                                                                                                       |
 | `SQRT`     | `0`      | Square root                                                                                                                                                                                                      |
 | `SGNJ`     | `0`      | Sign injection, operation encoded in rounding mode<br>`RNE`: `op[0]` with `sign(op[1])`<br>`RTZ`: `op[0]` with `~sign(op[1])`<br>`RDN`: `op[0]` with `sign(op[0]) ^ sign(op[1])`<br>`RUP`: `op[0]` (passthrough) |
@@ -336,12 +336,12 @@ For best results, we *strongly* encourage the use of automatic retiming options
 
 The configuration  `pipe_config_t` is an enumeration of type `logic [1:0]` holding the following implementation options for the pipelines in operational units:
 
-|   Enumerator  |                                             Description                                             |
-|---------------|-----------------------------------------------------------------------------------------------------|
-| `BEFORE`      | All pipeline registers are inserted at the inputs of the operational unit                           |
-| `AFTER`       | All pipeline registers are inserted at the outputs of the operational unit                          |
-| `INSIDE`      | All registers are inserted at roughly the middle of the operational unit (if not possible, `AFTER`) |
-| `DISTRIBUTED` | Registers are evenly distributed to `INSIDE`, `AFTER`, and `BEFORE` (if no `INSIDE`, all `AFTER`)   |
+|   Enumerator  |                                             Description                                              |
+|---------------|------------------------------------------------------------------------------------------------------|
+| `BEFORE`      | All pipeline registers are inserted at the inputs of the operational unit                            |
+| `AFTER`       | All pipeline registers are inserted at the outputs of the operational unit                           |
+| `INSIDE`      | All registers are inserted at roughly the middle of the operational unit (if not possible, `BEFORE`) |
+| `DISTRIBUTED` | Registers are evenly distributed to `INSIDE`, `BEFORE`, and `AFTER` (if no `INSIDE`, all `BEFORE`)   |
 
 
 

diff --git a/ips_list.yml b/ips_list.yml
@@ -23,5 +23,5 @@ common_cells:
   domain: [soc, cluster]
 
 fpu_div_sqrt_mvp:
-  commit: v1.0.1
+  commit: v1.0.3
   domain: [cluster,soc]