-
Hi! Gem5 beginner here. //testProc.c
#include <stdio.h>
#include "gem5/m5ops.h"
int main() {
//read some files to prepare
printf("Preparation completed!\n);
m5_dump_reset_stats(0,0);
//ROI code
m5_dump_stats(0,0);
return 0;
} Using SE mode and ARM arch (on X86 host) of Gem5, I called command: sudo ./build/ARM/gem5.debug ./configs/deprecated/example/se.py --cmd=/path/to/testProc But the simulated code aborted after printing "Preparation completed!". Here is the full output of gem5:
Though there is a panic of unknown inst(0x0000deff), I tried More attempts show that all m5ops(including How can I handle this? Or is there any other way for me to monitor the ROI code? Any information on this would be very helpful. Here are some additional information:
|
Beta Was this translation helpful? Give feedback.
Replies: 5 comments 1 reply
-
Hi, I have a similar issue and I have not figured out yet what is wrong. |
Beta Was this translation helpful? Give feedback.
-
@giactra are you aware of any problems with the implementation of the instruction version of m5ops for Arm in SE mode? |
Beta Was this translation helpful? Give feedback.
-
Thanks for the comments! I have no idea about the bug. But for those who have the same problem as me, that is, calling m5ops for ARM simulation on X86 host, here may be an alternative solution: inline void dump_reset_stats(){
__asm__ __volatile__ (
".inst 0xf04f0200\n" //mov.w r2, #0
".inst 0xf04f0300\n" //mov.w r3, #0
".inst 0xf04f0000\n" //mov.w r0, #0
".inst 0xf04f0100\n" //mov.w r1, #0
".inst 0xee420110\n" // m5_dump_reset_stats function call
:::"r0","r1","r2","r3"
);
}
inline void dump_stats(){
__asm__ __volatile__ (
".inst 0xf04f0200\n"
".inst 0xf04f0300\n"
".inst 0xf04f0000\n"
".inst 0xf04f0100\n"
".inst 0xee410110\n" // m5_dump_stats function call
:::"r0","r1","r2","r3"
);
} These functions call gem5ops directly via inline assembly code, and it does work for me. I'm not good at assembly code, so if there are any problems please feel free to point them out.
|
Beta Was this translation helpful? Give feedback.
-
Thanks for providing this info. I will look into this now |
Beta Was this translation helpful? Give feedback.
-
What I believe is happening is that you have an A32 implementation of the m5 function (you linked to it) but your CPU is actually in thumb mode so the instruction gets wrongly decoded. As a workaround you should add -marm to your CFLAGS to force A32 compilation.... We might consider doing something different in the long run... |
Beta Was this translation helpful? Give feedback.
What I believe is happening is that you have an A32 implementation of the m5 function (you linked to it) but your CPU is actually in thumb mode so the instruction gets wrongly decoded. As a workaround you should add -marm to your CFLAGS to force A32 compilation.... We might consider doing something different in the long run...